Skip to content

Commit 0372b58

Browse files
committed
Merge branch 'dev' of github.com:qilingframework/qiling into dev
2 parents 492886d + 5f3fc47 commit 0372b58

File tree

1 file changed

+16
-4
lines changed

1 file changed

+16
-4
lines changed

qiling/extensions/idaplugin/qilingida.py

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1415,6 +1415,10 @@ def __is_next_mbb(self, mbb):
14151415
return True
14161416

14171417
def _get_jmp_ins(self, ida_addr, insns):
1418+
# This cloud really happen! See issue #804. TODO: Investigate or re-design insns structure or replace it with ESIL.
1419+
# So we have to fallback to legacy path.
1420+
if ida_addr not in insns:
1421+
return (None, None)
14181422
ins_list = insns[ida_addr]
14191423
result = []
14201424
for bbid, ins in ins_list:
@@ -1497,7 +1501,7 @@ def _force_execution_by_parsing_assembly(self, ql, ida_addr):
14971501
high = IDA.get_operand(ida_addr, 1)
14981502
reg = IDA.print_operand(ida_addr, 0).lower()
14991503
val = (high << 16) + low
1500-
logging.info(f"Force set {reg1} to {hex(val)}")
1504+
logging.info(f"Force set {reg} to {hex(val)}")
15011505
ql.reg.__setattr__(reg, val)
15021506
return True
15031507
elif "csel" in instr: # csel dst, src1, src2, cond
@@ -1563,8 +1567,11 @@ def _guide_hook(self, ql, addr, size):
15631567
ql.emu_stop()
15641568

15651569
def _skip_unmapped_rw(self, ql, type, addr, size, value):
1566-
map_addr = ql.mem.align(addr)
1567-
map_size = ql.mem.align(size)
1570+
alignment = 0x1000
1571+
# Round down
1572+
map_addr = addr & (~(alignment - 1))
1573+
# Round up
1574+
map_size = ((size + (alignment - 1)) & (~(alignment - 1)))
15681575
if not ql.mem.is_mapped(map_addr, map_size):
15691576
logging.warning(f"Invalid memory R/W, trying to map {hex(map_size)} at {hex(map_addr)}")
15701577
ql.mem.map(map_addr, map_size)
@@ -1625,6 +1632,7 @@ def _search_path(self):
16251632
self.paths = {bbid: [] for bbid in self.bb_mapping.keys()}
16261633
reals = [self.first_block, *self.real_blocks]
16271634
self.deflatqlemu = QlEmuQiling()
1635+
self.deflatqlemu.path = self.qlemu.path
16281636
self.deflatqlemu.rootfs = self.qlemu.rootfs
16291637
first_block = self.bb_mapping[self.first_block]
16301638
if IDA.get_ql_arch_string() == "arm32":
@@ -1659,8 +1667,9 @@ def _search_path(self):
16591667
}
16601668
ql_bb_start_ea = self.deflatqlemu.ql_addr_from_ida(bb.start_ea) + self.append
16611669
ctx = ql.save()
1670+
# Skip force execution in the first block.
16621671
# `end=0` is a workaround for ql remembering last exit_point.
1663-
if braddr is None:
1672+
if braddr is None or bb.id == self.first_block:
16641673
ql.run(begin=ql_bb_start_ea, end=0, count=0xFFF)
16651674
else:
16661675
self.hook_data['force'] = {braddr: True}
@@ -1844,6 +1853,9 @@ def _prepare_microcodes(self, decomp_flags=ida_hexrays.DECOMP_WARNINGS | ida_hex
18441853
def ql_deflat(self):
18451854
if len(self.bb_mapping) == 0:
18461855
self.ql_parse_blocks_for_deobf()
1856+
if not self.qlinit:
1857+
logging.info("Qiling should be setup firstly!")
1858+
return
18471859
self.mba, self.insns, self.mbbs = self._prepare_microcodes(maturity=3)
18481860
logging.debug("Microcode generation done. Going to search path.")
18491861
if not self._search_path():

0 commit comments

Comments
 (0)