Skip to content

Commit 0ac80ef

Browse files
elicnelicn
committed
Reformat ARM64 xml files
1 parent 8549aa7 commit 0ac80ef

File tree

3 files changed

+146
-138
lines changed

3 files changed

+146
-138
lines changed

‎qiling/debugger/gdb/xml/arm64/aarch64-core.xml‎

Lines changed: 55 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -1,67 +1,67 @@
11
<?xml version="1.0"?>
22
<!-- Copyright (C) 2009-2016 Free Software Foundation, Inc.
3-
*!Contributed by ARM Ltd.
3+
Contributed by ARM Ltd.
44
5-
*!Copying and distribution of this file, with or without modification,
6-
*!are permitted in any medium without royalty provided the copyright
7-
*!notice and this notice are preserved. -->
5+
Copying and distribution of this file, with or without modification,
6+
are permitted in any medium without royalty provided the copyright
7+
notice and this notice are preserved. -->
88

99
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
1010
<feature name="org.gnu.gdb.aarch64.core">
11-
<reg name="x0" bitsize="64"/>
12-
<reg name="x1" bitsize="64"/>
13-
<reg name="x2" bitsize="64"/>
14-
<reg name="x3" bitsize="64"/>
15-
<reg name="x4" bitsize="64"/>
16-
<reg name="x5" bitsize="64"/>
17-
<reg name="x6" bitsize="64"/>
18-
<reg name="x7" bitsize="64"/>
19-
<reg name="x8" bitsize="64"/>
20-
<reg name="x9" bitsize="64"/>
21-
<reg name="x10" bitsize="64"/>
22-
<reg name="x11" bitsize="64"/>
23-
<reg name="x12" bitsize="64"/>
24-
<reg name="x13" bitsize="64"/>
25-
<reg name="x14" bitsize="64"/>
26-
<reg name="x15" bitsize="64"/>
27-
<reg name="x16" bitsize="64"/>
28-
<reg name="x17" bitsize="64"/>
29-
<reg name="x18" bitsize="64"/>
30-
<reg name="x19" bitsize="64"/>
31-
<reg name="x20" bitsize="64"/>
32-
<reg name="x21" bitsize="64"/>
33-
<reg name="x22" bitsize="64"/>
34-
<reg name="x23" bitsize="64"/>
35-
<reg name="x24" bitsize="64"/>
36-
<reg name="x25" bitsize="64"/>
37-
<reg name="x26" bitsize="64"/>
38-
<reg name="x27" bitsize="64"/>
39-
<reg name="x28" bitsize="64"/>
40-
<reg name="x29" bitsize="64"/>
41-
<reg name="x30" bitsize="64"/>
42-
<reg name="sp" bitsize="64" type="data_ptr"/>
11+
<reg name="x0" bitsize="64"/>
12+
<reg name="x1" bitsize="64"/>
13+
<reg name="x2" bitsize="64"/>
14+
<reg name="x3" bitsize="64"/>
15+
<reg name="x4" bitsize="64"/>
16+
<reg name="x5" bitsize="64"/>
17+
<reg name="x6" bitsize="64"/>
18+
<reg name="x7" bitsize="64"/>
19+
<reg name="x8" bitsize="64"/>
20+
<reg name="x9" bitsize="64"/>
21+
<reg name="x10" bitsize="64"/>
22+
<reg name="x11" bitsize="64"/>
23+
<reg name="x12" bitsize="64"/>
24+
<reg name="x13" bitsize="64"/>
25+
<reg name="x14" bitsize="64"/>
26+
<reg name="x15" bitsize="64"/>
27+
<reg name="x16" bitsize="64"/>
28+
<reg name="x17" bitsize="64"/>
29+
<reg name="x18" bitsize="64"/>
30+
<reg name="x19" bitsize="64"/>
31+
<reg name="x20" bitsize="64"/>
32+
<reg name="x21" bitsize="64"/>
33+
<reg name="x22" bitsize="64"/>
34+
<reg name="x23" bitsize="64"/>
35+
<reg name="x24" bitsize="64"/>
36+
<reg name="x25" bitsize="64"/>
37+
<reg name="x26" bitsize="64"/>
38+
<reg name="x27" bitsize="64"/>
39+
<reg name="x28" bitsize="64"/>
40+
<reg name="x29" bitsize="64"/>
41+
<reg name="x30" bitsize="64"/>
42+
<reg name="sp" bitsize="64" type="data_ptr"/>
4343

44-
<reg name="pc" bitsize="64" type="code_ptr"/>
44+
<reg name="pc" bitsize="64" type="code_ptr"/>
4545

46-
<flags id="cpsr_flags" size="4">
47-
* <field name="SP" start="0" end="0"/>
48-
* <field name="" start="1" end="1"/>
49-
* <field name="EL" start="2" end="3"/>
50-
* <field name="nRW" start="4" end="4"/>
51-
* <field name="" start="5" end="5"/>
52-
* <field name="F" start="6" end="6"/>
53-
* <field name="I" start="7" end="7"/>
54-
* <field name="A" start="8" end="8"/>
55-
* <field name="D" start="9" end="9"/>
46+
<flags id="cpsr_flags" size="4">
47+
<field name="SP" start="0" end="0"/>
48+
<field name="" start="1" end="1"/>
49+
<field name="EL" start="2" end="3"/>
50+
<field name="nRW" start="4" end="4"/>
51+
<field name="" start="5" end="5"/>
52+
<field name="F" start="6" end="6"/>
53+
<field name="I" start="7" end="7"/>
54+
<field name="A" start="8" end="8"/>
55+
<field name="D" start="9" end="9"/>
5656

57-
* <field name="IL" start="20" end="20"/>
58-
* <field name="SS" start="21" end="21"/>
57+
<field name="IL" start="20" end="20"/>
58+
<field name="SS" start="21" end="21"/>
5959

60-
* <field name="V" start="28" end="28"/>
61-
* <field name="C" start="29" end="29"/>
62-
* <field name="Z" start="30" end="30"/>
63-
* <field name="N" start="31" end="31"/>
64-
</flags>
65-
<reg name="cpsr" bitsize="32" type="cpsr_flags"/>
60+
<field name="V" start="28" end="28"/>
61+
<field name="C" start="29" end="29"/>
62+
<field name="Z" start="30" end="30"/>
63+
<field name="N" start="31" end="31"/>
64+
</flags>
6665

66+
<reg name="cpsr" bitsize="32" type="cpsr_flags"/>
6767
</feature>

‎qiling/debugger/gdb/xml/arm64/aarch64-fpu.xml‎

Lines changed: 86 additions & 79 deletions
Original file line numberDiff line numberDiff line change
@@ -1,86 +1,93 @@
11
<?xml version="1.0"?>
22
<!-- Copyright (C) 2009-2016 Free Software Foundation, Inc.
3-
*!Contributed by ARM Ltd.
3+
Contributed by ARM Ltd.
44
5-
*!Copying and distribution of this file, with or without modification,
6-
*!are permitted in any medium without royalty provided the copyright
7-
*!notice and this notice are preserved. -->
5+
Copying and distribution of this file, with or without modification,
6+
are permitted in any medium without royalty provided the copyright
7+
notice and this notice are preserved. -->
88

99
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
1010
<feature name="org.gnu.gdb.aarch64.fpu">
11-
<vector id="v2d" type="ieee_double" count="2"/>
12-
<vector id="v2u" type="uint64" count="2"/>
13-
<vector id="v2i" type="int64" count="2"/>
14-
<vector id="v4f" type="ieee_single" count="4"/>
15-
<vector id="v4u" type="uint32" count="4"/>
16-
<vector id="v4i" type="int32" count="4"/>
17-
<vector id="v8u" type="uint16" count="8"/>
18-
<vector id="v8i" type="int16" count="8"/>
19-
<vector id="v16u" type="uint8" count="16"/>
20-
<vector id="v16i" type="int8" count="16"/>
21-
<vector id="v1u" type="uint128" count="1"/>
22-
<vector id="v1i" type="int128" count="1"/>
23-
<union id="vnd">
24-
* <field name="f" type="v2d"/>
25-
* <field name="u" type="v2u"/>
26-
* <field name="s" type="v2i"/>
27-
</union>
28-
<union id="vns">
29-
* <field name="f" type="v4f"/>
30-
* <field name="u" type="v4u"/>
31-
* <field name="s" type="v4i"/>
32-
</union>
33-
<union id="vnh">
34-
* <field name="u" type="v8u"/>
35-
* <field name="s" type="v8i"/>
36-
</union>
37-
<union id="vnb">
38-
* <field name="u" type="v16u"/>
39-
* <field name="s" type="v16i"/>
40-
</union>
41-
<union id="vnq">
42-
* <field name="u" type="v1u"/>
43-
* <field name="s" type="v1i"/>
44-
</union>
45-
<union id="aarch64v">
46-
* <field name="d" type="vnd"/>
47-
* <field name="s" type="vns"/>
48-
* <field name="h" type="vnh"/>
49-
* <field name="b" type="vnb"/>
50-
* <field name="q" type="vnq"/>
51-
</union>
52-
<reg name="v0" bitsize="128" type="aarch64v" regnum="34"/>
53-
<reg name="v1" bitsize="128" type="aarch64v" />
54-
<reg name="v2" bitsize="128" type="aarch64v" />
55-
<reg name="v3" bitsize="128" type="aarch64v" />
56-
<reg name="v4" bitsize="128" type="aarch64v" />
57-
<reg name="v5" bitsize="128" type="aarch64v" />
58-
<reg name="v6" bitsize="128" type="aarch64v" />
59-
<reg name="v7" bitsize="128" type="aarch64v" />
60-
<reg name="v8" bitsize="128" type="aarch64v" />
61-
<reg name="v9" bitsize="128" type="aarch64v" />
62-
<reg name="v10" bitsize="128" type="aarch64v"/>
63-
<reg name="v11" bitsize="128" type="aarch64v"/>
64-
<reg name="v12" bitsize="128" type="aarch64v"/>
65-
<reg name="v13" bitsize="128" type="aarch64v"/>
66-
<reg name="v14" bitsize="128" type="aarch64v"/>
67-
<reg name="v15" bitsize="128" type="aarch64v"/>
68-
<reg name="v16" bitsize="128" type="aarch64v"/>
69-
<reg name="v17" bitsize="128" type="aarch64v"/>
70-
<reg name="v18" bitsize="128" type="aarch64v"/>
71-
<reg name="v19" bitsize="128" type="aarch64v"/>
72-
<reg name="v20" bitsize="128" type="aarch64v"/>
73-
<reg name="v21" bitsize="128" type="aarch64v"/>
74-
<reg name="v22" bitsize="128" type="aarch64v"/>
75-
<reg name="v23" bitsize="128" type="aarch64v"/>
76-
<reg name="v24" bitsize="128" type="aarch64v"/>
77-
<reg name="v25" bitsize="128" type="aarch64v"/>
78-
<reg name="v26" bitsize="128" type="aarch64v"/>
79-
<reg name="v27" bitsize="128" type="aarch64v"/>
80-
<reg name="v28" bitsize="128" type="aarch64v"/>
81-
<reg name="v29" bitsize="128" type="aarch64v"/>
82-
<reg name="v30" bitsize="128" type="aarch64v"/>
83-
<reg name="v31" bitsize="128" type="aarch64v"/>
84-
<reg name="fpsr" bitsize="32"/>
85-
<reg name="fpcr" bitsize="32"/>
11+
<vector id="v2d" type="ieee_double" count="2"/>
12+
<vector id="v2u" type="uint64" count="2"/>
13+
<vector id="v2i" type="int64" count="2"/>
14+
<vector id="v4f" type="ieee_single" count="4"/>
15+
<vector id="v4u" type="uint32" count="4"/>
16+
<vector id="v4i" type="int32" count="4"/>
17+
<vector id="v8u" type="uint16" count="8"/>
18+
<vector id="v8i" type="int16" count="8"/>
19+
<vector id="v16u" type="uint8" count="16"/>
20+
<vector id="v16i" type="int8" count="16"/>
21+
<vector id="v1u" type="uint128" count="1"/>
22+
<vector id="v1i" type="int128" count="1"/>
23+
24+
<union id="vnd">
25+
<field name="f" type="v2d"/>
26+
<field name="u" type="v2u"/>
27+
<field name="s" type="v2i"/>
28+
</union>
29+
30+
<union id="vns">
31+
<field name="f" type="v4f"/>
32+
<field name="u" type="v4u"/>
33+
<field name="s" type="v4i"/>
34+
</union>
35+
36+
<union id="vnh">
37+
<field name="u" type="v8u"/>
38+
<field name="s" type="v8i"/>
39+
</union>
40+
41+
<union id="vnb">
42+
<field name="u" type="v16u"/>
43+
<field name="s" type="v16i"/>
44+
</union>
45+
46+
<union id="vnq">
47+
<field name="u" type="v1u"/>
48+
<field name="s" type="v1i"/>
49+
</union>
50+
51+
<union id="aarch64v">
52+
<field name="d" type="vnd"/>
53+
<field name="s" type="vns"/>
54+
<field name="h" type="vnh"/>
55+
<field name="b" type="vnb"/>
56+
<field name="q" type="vnq"/>
57+
</union>
58+
59+
<reg name="v0" bitsize="128" type="aarch64v" regnum="34"/>
60+
<reg name="v1" bitsize="128" type="aarch64v" />
61+
<reg name="v2" bitsize="128" type="aarch64v" />
62+
<reg name="v3" bitsize="128" type="aarch64v" />
63+
<reg name="v4" bitsize="128" type="aarch64v" />
64+
<reg name="v5" bitsize="128" type="aarch64v" />
65+
<reg name="v6" bitsize="128" type="aarch64v" />
66+
<reg name="v7" bitsize="128" type="aarch64v" />
67+
<reg name="v8" bitsize="128" type="aarch64v" />
68+
<reg name="v9" bitsize="128" type="aarch64v" />
69+
<reg name="v10" bitsize="128" type="aarch64v"/>
70+
<reg name="v11" bitsize="128" type="aarch64v"/>
71+
<reg name="v12" bitsize="128" type="aarch64v"/>
72+
<reg name="v13" bitsize="128" type="aarch64v"/>
73+
<reg name="v14" bitsize="128" type="aarch64v"/>
74+
<reg name="v15" bitsize="128" type="aarch64v"/>
75+
<reg name="v16" bitsize="128" type="aarch64v"/>
76+
<reg name="v17" bitsize="128" type="aarch64v"/>
77+
<reg name="v18" bitsize="128" type="aarch64v"/>
78+
<reg name="v19" bitsize="128" type="aarch64v"/>
79+
<reg name="v20" bitsize="128" type="aarch64v"/>
80+
<reg name="v21" bitsize="128" type="aarch64v"/>
81+
<reg name="v22" bitsize="128" type="aarch64v"/>
82+
<reg name="v23" bitsize="128" type="aarch64v"/>
83+
<reg name="v24" bitsize="128" type="aarch64v"/>
84+
<reg name="v25" bitsize="128" type="aarch64v"/>
85+
<reg name="v26" bitsize="128" type="aarch64v"/>
86+
<reg name="v27" bitsize="128" type="aarch64v"/>
87+
<reg name="v28" bitsize="128" type="aarch64v"/>
88+
<reg name="v29" bitsize="128" type="aarch64v"/>
89+
<reg name="v30" bitsize="128" type="aarch64v"/>
90+
<reg name="v31" bitsize="128" type="aarch64v"/>
91+
<reg name="fpsr" bitsize="32"/>
92+
<reg name="fpcr" bitsize="32"/>
8693
</feature>

‎qiling/debugger/gdb/xml/arm64/target.xml‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,15 @@
11
<?xml version="1.0"?>
22
<!-- Copyright (C) 2009-2016 Free Software Foundation, Inc.
3-
*!Contributed by ARM Ltd.
3+
Contributed by ARM Ltd.
44
5-
*!Copying and distribution of this file, with or without modification,
6-
*!are permitted in any medium without royalty provided the copyright
7-
*!notice and this notice are preserved. -->
5+
Copying and distribution of this file, with or without modification,
6+
are permitted in any medium without royalty provided the copyright
7+
notice and this notice are preserved. -->
88

99
<!DOCTYPE target SYSTEM "gdb-target.dtd">
1010
<target xmlns:xi="http://www.w3.org/2001/XInclude">
1111
<architecture>aarch64</architecture>
12+
1213
<xi:include href="aarch64-core.xml"/>
1314
<xi:include href="aarch64-fpu.xml"/>
1415
</target>

0 commit comments

Comments
 (0)