Add device support for USART, I2C and SPI

Author: cla7aye15I4nd

qiling/hw/char/stm32f4xx_usart.py

@@ -94,10 +94,11 @@ def transfer(self):
 
         if not (self.usart.SR & USART_SR.RXNE): 
             # TXE bit must had been cleared
-            if self.can_recv():
+            if self.has_input():
                 self.usart.SR |= USART_SR.RXNE
                 self.usart.DR = self.recv_from_user()
 
+    @QlConnectivityPeripheral.device_handler
     def step(self):
         self.transfer()
 

qiling/hw/i2c/stm32f4xx_i2c.py

@@ -6,10 +6,11 @@
 import ctypes
 
 from qiling.hw.peripheral import QlPeripheral
+from qiling.hw.connectivity import QlConnectivityPeripheral
 from qiling.hw.const.stm32f4xx_i2c import I2C_CR1, I2C_CR2, I2C_SR1, I2C_SR2, I2C_DR, I2C_OAR1, I2C_OAR2
 
 
-class STM32F4xxI2c(QlPeripheral):
+class STM32F4xxI2c(QlConnectivityPeripheral):
 	class Type(ctypes.Structure):
 		""" the structure is available in :
 			stm32f423xx.h
@@ -52,9 +53,6 @@ def __init__(self, ql, label, ev_intn=None, er_intn=None):
 		self.ev_intn = ev_intn # event interrupt
 		self.er_intn = er_intn # error interrupt
 
-		self.devices = []
-		self.current = None
-		
 		self.reset()
 
 	def reset(self):		
@@ -147,17 +145,15 @@ def generate_stop(self):
 
 	def send_address(self):
 		if self.i2c.DR == self.i2c.OAR1 >> 1:
-			for dev in self.devices:
-				if self.i2c.DR == dev.address:
-					self.current = dev
 
 			# TODO: send ACK
 			self.i2c.SR1 |= I2C_SR1.ADDR | I2C_SR1.TXE
 			self.send_event_interrupt()
 
 	def send_data(self):
 		self.i2c.SR1 |= I2C_SR1.BTF | I2C_SR1.TXE
-		self.current.send(self.i2c.DR)
+
+		self.send_to_user(self.i2c.DR)
 		self.send_event_interrupt()
 
 	## I2C Status register 2 (I2C_SR2)
@@ -191,16 +187,17 @@ def is_7bit_mode(self):
 	def fetch_device_address(self):
 		# dual addressing mode
 		if self.i2c.OAR2 & I2C_OAR2.ENDUAL:
-			self.i2c.OAR1 = self.devices[0].address << 1
-			self.i2c.OAR2 = I2C_OAR2.ENDUAL | (self.devices[1].address << 1)
+			self.i2c.OAR1 = self.device_list[0].address << 1
+			self.i2c.OAR2 = I2C_OAR2.ENDUAL | (self.device_list[1].address << 1)
 
 		# single device, 10-bit slave address
 		elif self.i2c.OAR1 & I2C_OAR1.ADDMODE: 
-			self.i2c.OAR1 = I2C_OAR1.ADDMODE | self.devices[0].address
+			self.i2c.OAR1 = I2C_OAR1.ADDMODE | self.device_list[0].address
 
 		# single device, 7-bit slave address
 		else:
-			self.i2c.OAR1 = self.devices[0].address << 1
+			self.i2c.OAR1 = self.device_list[0].address << 1
 
-	def connect(self, dev):
-		self.devices.append(dev)
+	@QlConnectivityPeripheral.device_handler
+	def step(self):
+		pass

qiling/hw/spi/stm32f4xx_spi.py

@@ -4,11 +4,13 @@
 #
 
 import ctypes
+
 from qiling.hw.peripheral import QlPeripheral
+from qiling.hw.connectivity import QlConnectivityPeripheral
 from qiling.hw.const.stm32f4xx_spi import SPI_CR1, SPI_CR2, SPI_SR, SPI_CRCPR, SPI_I2SCFGR, SPI_I2SPR
 
 
-class STM32F4xxSpi(QlPeripheral):
+class STM32F4xxSpi(QlConnectivityPeripheral):
     class Type(ctypes.Structure):
         """ the structure available in :
             stm32f413xx.h
@@ -99,10 +101,12 @@ def write(self, offset: int, size: int, value: int):
         ctypes.memmove(ctypes.addressof(self.spi) + offset, data, size)   
 
         if self.in_field(self.struct.DR, offset, size):
-            self.send_data()     
+            self.spi.SR |= SPI_SR.RXNE
+            self.send_to_user(self.spi.DR)
 
     def send_interrupt(self):
         self.ql.hw.nvic.set_pending(self.intn)
 
-    def send_data(self):
-        self.spi.SR |= SPI_SR.RXNE
+    @QlConnectivityPeripheral.device_handler
+    def step(self):
+        pass