@@ -1466,7 +1466,7 @@ def _force_execution_by_parsing_assembly(self, ql, ida_addr):
14661466 if "x86" in IDA .get_ql_arch_string (): # cmovlg eax, ebx
14671467 reg1 = IDA .print_operand (ida_addr , 0 ).lower ()
14681468 reg2 = IDA .print_operand (ida_addr , 1 ).lower ()
1469- reg2_val = ql .arch .regs .__getattribute__ (reg2 )
1469+ reg2_val = ql .arch .regs .__getattr__ (reg2 )
14701470 logging .info (f"Force set { reg1 } to { hex (reg2_val )} " )
14711471 ql .arch .regs .__setattr__ (reg1 , reg2_val )
14721472 return True
@@ -1486,7 +1486,7 @@ def _force_execution_by_parsing_assembly(self, ql, ida_addr):
14861486 elif "csel" in instr : # csel dst, src1, src2, cond
14871487 dst = IDA .print_operand (ida_addr , 0 ).lower ()
14881488 src = IDA .print_operand (ida_addr , 2 ).lower ()
1489- src_val = ql .arch .regs .__getattribute__ (src )
1489+ src_val = ql .arch .regs .__getattr__ (src )
14901490 logging .info (f"Force set { dst } to { hex (src_val )} " )
14911491 ql .arch .regs .__setattr__ (dst , src_val )
14921492 return True
@@ -1597,7 +1597,7 @@ def _log_verbose(self, ql, addr, size):
15971597 registers = [ k for k in ql .arch .regs .register_mapping .keys () if type (k ) is str ]
15981598 for idx in range (0 , len (registers ), 3 ):
15991599 regs = registers [idx :idx + 3 ]
1600- s = "\t " .join (map (lambda v : f"{ v :4} : { ql .arch .regs .__getattribute__ (v ):016x} " , regs ))
1600+ s = "\t " .join (map (lambda v : f"{ v :4} : { ql .arch .regs .__getattr__ (v ):016x} " , regs ))
16011601 logging .debug (s )
16021602
16031603 # Q: Why we need emulation to help us find real control flow considering there are some
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