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ChangeLog

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This file details the changelog of Qiling Framework.
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------------------------------------
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[Version 1.4.1]: Nov Xth, 2021
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[Version 1.4.1]: Nov 15th, 2021
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New features:
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- Introduced riscv, both 32 and 64 (#980)
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- Added U-boot (#1000)
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Improvements:
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- Refactored core hooks (#966)
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- update ql.os.posix.const_mapping with more os/arch match (#973)
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- Minor refactor on ql.interpreter and ql.baremetal (#975)
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- More update in MCU modules (#971)
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- Fix getpeername and getsockname syscalls (#986)
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- Qdb improvements (#999)
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Contributors:
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- cq674350529
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- ucgJhe
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- cla7aye15I4nd
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- elicn
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- xwings
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------------------------------------

README.md

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[![Documentation Status](https://readthedocs.org/projects/qilingframework/badge/?version=latest)](https://docs.qiling.io)
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[![Downloads](https://pepy.tech/badge/qiling)](https://pepy.tech/project/qiling)
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[![Chat on Telegram](https://img.shields.io/badge/Chat%20on-Telegram-brightgreen.svg)](https://t.me/qilingframework)
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---
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<p align="center">
@@ -193,14 +195,11 @@ With binary and GDB debugger enable:
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$ ./qltool run -f examples/rootfs/x8664_linux/bin/x8664_hello --gdb 127.0.0.1:9999 --rootfs examples/rootfs/x8664_linux
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```
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See https://docs.qiling.io/ for more details
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With code coverage collection (UEFI only for now):
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```
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$ ./qltool run -f examples/rootfs/x8664_efi/bin/TcgPlatformSetupPolicy --rootfs examples/rootfs/x8664_efi --coverage-format drcov --coverage-file TcgPlatformSetupPolicy.cov
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```
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---
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With json output (Windows mainly):
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examples/hello_arm_uboot.py

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#!/usr/bin/env python3
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#
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# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
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#
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import sys
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sys.path.append("..")
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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.os.const import STRING
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def get_kaimendaji_password():
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def my_getenv(ql, *args, **kwargs):
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env = {"ID": b"000000000000000", "ethaddr": b"11:22:33:44:55:66"}
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params = ql.os.resolve_fcall_params({'key': STRING})
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value = env.get(params["key"], b"")
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value_addr = ql.os.heap.alloc(len(value))
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ql.mem.write(value_addr, value)
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ql.reg.r0 = value_addr
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ql.reg.arch_pc = ql.reg.lr
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def get_password(ql, *args, **kwargs):
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password_raw = ql.mem.read(ql.reg.r0, ql.reg.r2)
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password = ''
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for item in password_raw:
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if 0 <= item <= 9:
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password += chr(item + 48)
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else:
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password += chr(item + 87)
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print("The password is: %s" % password)
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def partial_run_init(ql):
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# argv prepare
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ql.reg.arch_sp -= 0x30
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arg0_ptr = ql.reg.arch_sp
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ql.mem.write(arg0_ptr, b"kaimendaji")
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ql.reg.arch_sp -= 0x10
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arg1_ptr = ql.reg.arch_sp
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ql.mem.write(arg1_ptr, b"000000") # arbitrary password
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ql.reg.arch_sp -= 0x20
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argv_ptr = ql.reg.arch_sp
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ql.mem.write(argv_ptr, ql.pack(arg0_ptr))
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ql.mem.write(argv_ptr + ql.pointersize, ql.pack(arg1_ptr))
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ql.reg.r2 = 2
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ql.reg.r3 = argv_ptr
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with open("../examples/rootfs/blob/u-boot.bin.img", "rb") as f:
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uboot_code = f.read()
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ql = Qiling(code=uboot_code[0x40:], archtype="arm", ostype="blob", profile="uboot_bin.ql", verbose=QL_VERBOSE.OFF)
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image_base_addr = ql.loader.load_address
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ql.hook_address(my_getenv, image_base_addr + 0x13AC0)
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ql.hook_address(get_password, image_base_addr + 0x48634)
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partial_run_init(ql)
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ql.run(image_base_addr + 0x486B4, image_base_addr + 0x48718)
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if __name__ == "__main__":
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get_kaimendaji_password()

examples/mcu/gd32vf103_blink.py

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import sys
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sys.path.append("../..")
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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.extensions.mcu.gd32vf1 import gd32vf103
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ql = Qiling(['../rootfs/mcu/gd32vf103/blink.hex'], archtype="riscv64",
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env=gd32vf103, verbose=QL_VERBOSE.DEBUG)
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ql.hw.create('rcu')
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ql.hw.create('gpioa').watch()
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ql.hw.create('gpioc').watch()
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delay_cycles_begin = 0x800015c
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delay_cycles_end = 0x800018c
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def skip_delay(ql):
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ql.reg.pc = delay_cycles_end
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ql.hook_address(skip_delay, delay_cycles_begin)
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ql.hw.gpioc.hook_set(13, lambda : print('Set PC13'))
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ql.run(count=20000)

examples/mcu/stm32f407_hack_lock.py

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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.extensions.mcu.stm32f4 import stm32f407
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def dicts():
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a = 0x79df7
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# Cracking the passwd of lock
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def crack(passwd):
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ql = Qiling(["../../examples/rootfs/mcu/stm32f407/backdoorlock.hex"],
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archtype="cortex_m", profile="stm32f407", verbose=QL_VERBOSE.OFF)
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archtype="cortex_m", env=stm32f407, verbose=QL_VERBOSE.OFF)
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ql.hw.create('spi2')
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ql.hw.create('gpioe')

examples/mcu/stm32f411_dma_logger.py

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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.extensions.mcu.stm32f4 import stm32f411
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def stm32f411_dma():
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ql = Qiling(["../rootfs/mcu/stm32f411/dma-clock.hex"],
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archtype="cortex_m", profile="stm32f411", verbose=QL_VERBOSE.DEBUG)
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archtype="cortex_m", env=stm32f411, verbose=QL_VERBOSE.DEBUG)
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ql.hw.create('usart2').watch()
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ql.hw.create('dma1').watch()

examples/mcu/stm32f411_freertos.py

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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.extensions.mcu.stm32f4 import stm32f411
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def stm32f411_freertos():
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ql = Qiling(["../rootfs/mcu/stm32f411/os-demo.hex"],
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archtype="cortex_m", profile="stm32f411", verbose=QL_VERBOSE.DEBUG)
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archtype="cortex_m", env=stm32f411, verbose=QL_VERBOSE.DEBUG)
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ql.hw.create('usart2').watch()
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ql.hw.create('gpioa').watch()

examples/mcu/stm32f411_gpio_hook.py

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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.extensions.mcu.stm32f4 import stm32f411
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def test_mcu_gpio_stm32f411():
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ql = Qiling(["../../examples/rootfs/mcu/stm32f411/hello_gpioA.hex"],
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archtype="cortex_m", profile="stm32f411", verbose=QL_VERBOSE.DEBUG)
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archtype="cortex_m", env=stm32f411, verbose=QL_VERBOSE.DEBUG)
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ql.hw.create('usart2').watch()
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ql.hw.create('rcc').watch()

examples/mcu/stm32f411_i2c_lcd.py

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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.hw.external_device.lcd.lcd1602 import PyGameLCD1602
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from qiling.extensions.mcu.stm32f4 import stm32f411
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def create(path, lcd):
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ql = Qiling([path], archtype="cortex_m", profile="stm32f411", verbose=QL_VERBOSE.DEBUG)
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ql = Qiling([path], archtype="cortex_m", env=stm32f411, verbose=QL_VERBOSE.DEBUG)
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ql.hw.create('i2c1')
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ql.hw.create('rcc')

examples/mcu/stm32f411_interact_usart.py

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from qiling.core import Qiling
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from qiling.const import QL_VERBOSE
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from qiling.extensions.mcu.stm32f4 import stm32f411
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ql = Qiling(["../../examples/rootfs/mcu/stm32f411/md5_server.hex"],
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archtype="cortex_m", profile="stm32f411", verbose=QL_VERBOSE.OFF)
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archtype="cortex_m", env=stm32f411, verbose=QL_VERBOSE.OFF)
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ql.hw.create('usart2')
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ql.hw.create('rcc')

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