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Merge pull request #1574 from elicn/fix-qdb-cortexm
Fix qdb support for ARM Cortex-M
2 parents d614855 + 95d7b8f commit 7bcb5ab

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3 files changed

+14
-10
lines changed

3 files changed

+14
-10
lines changed

qiling/debugger/qdb/arch/arch_arm.py

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,14 @@
33
# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
44
#
55

6-
from typing import Dict, Optional
6+
from typing import ClassVar, Dict, Optional
77

88
from .arch import Arch
99

1010

1111
class ArchARM(Arch):
12+
_flags_reg: ClassVar[str] = 'cpsr'
13+
1214
def __init__(self) -> None:
1315
regs = (
1416
'r0', 'r1', 'r2', 'r3',
@@ -134,6 +136,8 @@ def read_insn(self, address: int) -> Optional[bytearray]:
134136

135137

136138
class ArchCORTEX_M(ArchARM):
139+
_flags_reg: ClassVar[str] = 'xpsr'
140+
137141
def __init__(self):
138142
super().__init__()
139143

qiling/debugger/qdb/branch_predictor/branch_predictor_arm.py

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -27,11 +27,11 @@ class BranchPredictorARM(BranchPredictor, ArchARM):
2727

2828
stop = 'udf'
2929

30-
def get_cpsr(self) -> Tuple[bool, bool, bool, bool]:
31-
"""Get flags map of CPSR.
30+
def get_cond_flags(self) -> Tuple[bool, bool, bool, bool]:
31+
"""Get condition status flags from CPSR / xPSR.
3232
"""
3333

34-
cpsr = self.read_reg('cpsr')
34+
cpsr = self.read_reg(self._flags_reg)
3535

3636
return (
3737
(cpsr & (0b1 << 28)) != 0, # V, overflow flag
@@ -122,9 +122,9 @@ def __parse_op(op: ArmOp, *args, **kwargs) -> Optional[int]:
122122

123123
def __is_taken(cc: int) -> Tuple[bool, Tuple[bool, ...]]:
124124
pred = predicate[cc]
125-
cpsr = self.get_cpsr()
125+
flags = self.get_cond_flags()
126126

127-
return pred(*cpsr), cpsr
127+
return pred(*flags), flags
128128

129129
# conditions predicate selector
130130
predicate: Dict[int, Callable[..., bool]] = {
@@ -215,13 +215,13 @@ def __is_taken(cc: int) -> Tuple[bool, Tuple[bool, ...]]:
215215
where = __parse_op(operands[1], **msize[suffix])
216216

217217
elif iname in binop:
218-
going, cpsr = __is_taken(insn.cc)
218+
going, flags = __is_taken(insn.cc)
219219

220220
if going:
221221
operator = binop[iname]
222222
op1 = __parse_op(operands[1])
223223
op2 = __parse_op(operands[2])
224-
carry = int(cpsr[1])
224+
carry = int(flags[1])
225225

226226
where = (op1 and op2) and operator(op1, op2, carry)
227227

qiling/debugger/qdb/render/render_arm.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
44
#
55

6-
from typing import Iterator, Optional
6+
from typing import Iterator
77

88
from .render import Render, ContextRender
99
from ..arch import ArchARM, ArchCORTEX_M
@@ -15,7 +15,7 @@ class ContextRenderARM(ContextRender, ArchARM):
1515
"""
1616

1717
def print_mode_info(self) -> None:
18-
cpsr = self.read_reg('cpsr')
18+
cpsr = self.read_reg(self._flags_reg)
1919

2020
flags = ArchARM.get_flags(cpsr)
2121
mode = ArchARM.get_mode(cpsr)

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