|
4 | 4 | # |
5 | 5 |
|
6 | 6 | from functools import cached_property |
7 | | -from typing import Union |
8 | 7 |
|
9 | 8 | from unicorn import Uc, UC_ARCH_X86, UC_MODE_16, UC_MODE_32, UC_MODE_64 |
10 | 9 | from capstone import Cs, CS_ARCH_X86, CS_MODE_16, CS_MODE_32, CS_MODE_64 |
11 | 10 | from keystone import Ks, KS_ARCH_X86, KS_MODE_16, KS_MODE_32, KS_MODE_64 |
12 | 11 |
|
13 | | -from unicorn.x86_const import UC_X86_REG_EFLAGS |
14 | | - |
15 | 12 | from qiling.arch.arch import QlArch |
16 | 13 | from qiling.arch.msr import QlMsrManager |
17 | 14 | from qiling.arch.register import QlRegisterManager |
@@ -126,33 +123,3 @@ def disassembler(self) -> Cs: |
126 | 123 | @cached_property |
127 | 124 | def assembler(self) -> Ks: |
128 | 125 | return Ks(KS_ARCH_X86, KS_MODE_64) |
129 | | - |
130 | | - # TODO: generalize this |
131 | | - def __reg_bits(self, register: int) -> int: |
132 | | - # all regs in reg_map_misc are 16 bits except of eflags |
133 | | - if register == UC_X86_REG_EFLAGS: |
134 | | - return 32 |
135 | | - |
136 | | - regmaps = ( |
137 | | - (x86_const.reg_map_8, 8), |
138 | | - (x86_const.reg_map_16, 16), |
139 | | - (x86_const.reg_map_32, 32), |
140 | | - (x86_const.reg_map_64, 64), |
141 | | - (x86_const.reg_map_misc, 16), |
142 | | - (x86_const.reg_map_cr, 64), # 32 bits for x86 |
143 | | - (x86_const.reg_map_st, 32), |
144 | | - (x86_const.reg_map_seg_base, 64), # 32 bits for x86 |
145 | | - ) |
146 | | - |
147 | | - return next((rsize for rmap, rsize in regmaps if register in rmap.values()), 0) |
148 | | - |
149 | | - # note: this method was not generalized for all archs since it requires a bookkeeping |
150 | | - # of all registers, while it is used only by gdb and only for x86-64 |
151 | | - def reg_bits(self, reg: Union[str, int]) -> int: |
152 | | - """Get register size in bits. |
153 | | - """ |
154 | | - |
155 | | - if type(reg) is str: |
156 | | - reg = self.regs.register_mapping[reg] |
157 | | - |
158 | | - return self.__reg_bits(reg) |
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