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Add missing regs for MIPS
1 parent 897f2a8 commit d49beed

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2 files changed

+71
-2
lines changed

2 files changed

+71
-2
lines changed

qiling/arch/mips.py

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,8 @@ def uc(self) -> Uc:
3737
def regs(self) -> QlRegisterManager:
3838
regs_map = dict(
3939
**mips_const.reg_map,
40-
**mips_const.reg_map_afpr128
40+
**mips_const.reg_map_afpr128,
41+
**mips_const.reg_map_fpu
4142
)
4243

4344
pc_reg = 'pc'

qiling/arch/mips_const.py

Lines changed: 69 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,39 @@
66
from unicorn.mips_const import *
77

88
reg_map = {
9+
"r0" : UC_MIPS_REG_0,
10+
"r1" : UC_MIPS_REG_1,
11+
"r2" : UC_MIPS_REG_2,
12+
"r3" : UC_MIPS_REG_3,
13+
"r4" : UC_MIPS_REG_4,
14+
"r5" : UC_MIPS_REG_5,
15+
"r6" : UC_MIPS_REG_6,
16+
"r7" : UC_MIPS_REG_7,
17+
"r8" : UC_MIPS_REG_8,
18+
"r9" : UC_MIPS_REG_9,
19+
"r10" : UC_MIPS_REG_10,
20+
"r11" : UC_MIPS_REG_11,
21+
"r12" : UC_MIPS_REG_12,
22+
"r13" : UC_MIPS_REG_13,
23+
"r14" : UC_MIPS_REG_14,
24+
"r15" : UC_MIPS_REG_15,
25+
"r16" : UC_MIPS_REG_16,
26+
"r17" : UC_MIPS_REG_17,
27+
"r18" : UC_MIPS_REG_18,
28+
"r19" : UC_MIPS_REG_19,
29+
"r20" : UC_MIPS_REG_20,
30+
"r21" : UC_MIPS_REG_21,
31+
"r22" : UC_MIPS_REG_22,
32+
"r23" : UC_MIPS_REG_23,
33+
"r24" : UC_MIPS_REG_24,
34+
"r25" : UC_MIPS_REG_25,
35+
"r26" : UC_MIPS_REG_26,
36+
"r27" : UC_MIPS_REG_27,
37+
"r28" : UC_MIPS_REG_28,
38+
"r29" : UC_MIPS_REG_29,
39+
"r30" : UC_MIPS_REG_30,
40+
"r31" : UC_MIPS_REG_31,
41+
942
"zero": UC_MIPS_REG_ZERO,
1043
"at": UC_MIPS_REG_AT,
1144
"v0": UC_MIPS_REG_V0,
@@ -49,4 +82,39 @@
4982
reg_map_afpr128 = {
5083
"cp0_config3" : UC_MIPS_REG_CP0_CONFIG3,
5184
"cp0_userlocal": UC_MIPS_REG_CP0_USERLOCAL,
52-
}
85+
}
86+
87+
reg_map_fpu = {
88+
"f0" : UC_MIPS_REG_F0,
89+
"f1" : UC_MIPS_REG_F1,
90+
"f2" : UC_MIPS_REG_F2,
91+
"f3" : UC_MIPS_REG_F3,
92+
"f4" : UC_MIPS_REG_F4,
93+
"f5" : UC_MIPS_REG_F5,
94+
"f6" : UC_MIPS_REG_F6,
95+
"f7" : UC_MIPS_REG_F7,
96+
"f8" : UC_MIPS_REG_F8,
97+
"f9" : UC_MIPS_REG_F9,
98+
"f10" : UC_MIPS_REG_F10,
99+
"f11" : UC_MIPS_REG_F11,
100+
"f12" : UC_MIPS_REG_F12,
101+
"f13" : UC_MIPS_REG_F13,
102+
"f14" : UC_MIPS_REG_F14,
103+
"f15" : UC_MIPS_REG_F15,
104+
"f16" : UC_MIPS_REG_F16,
105+
"f17" : UC_MIPS_REG_F17,
106+
"f18" : UC_MIPS_REG_F18,
107+
"f19" : UC_MIPS_REG_F19,
108+
"f20" : UC_MIPS_REG_F20,
109+
"f21" : UC_MIPS_REG_F21,
110+
"f22" : UC_MIPS_REG_F22,
111+
"f23" : UC_MIPS_REG_F23,
112+
"f24" : UC_MIPS_REG_F24,
113+
"f25" : UC_MIPS_REG_F25,
114+
"f26" : UC_MIPS_REG_F26,
115+
"f27" : UC_MIPS_REG_F27,
116+
"f28" : UC_MIPS_REG_F28,
117+
"f29" : UC_MIPS_REG_F29,
118+
"f30" : UC_MIPS_REG_F30,
119+
"f31" : UC_MIPS_REG_F31
120+
}

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