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Fix gdbserver issues
1 parent 33a2b6d commit f09bab8

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6 files changed

+40
-19
lines changed

6 files changed

+40
-19
lines changed

‎qiling/arch/arm64.py‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ def __init__(self, ql):
1515
super(QlArchARM64, self).__init__(ql)
1616

1717
register_mappings = [
18-
reg_map
18+
reg_map, reg_map_part
1919
]
2020

2121
for reg_maper in register_mappings:

‎qiling/arch/arm64_const.py‎

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,14 @@
3737
"x28": UC_ARM64_REG_X28,
3838
"x29": UC_ARM64_REG_X29,
3939
"x30": UC_ARM64_REG_X30,
40+
"sp": UC_ARM64_REG_SP,
41+
"pc": UC_ARM64_REG_PC,
42+
"lr": UC_ARM64_REG_LR,
43+
"cpacr_el1": UC_ARM64_REG_CPACR_EL1,
44+
"tpidr_el0": UC_ARM64_REG_TPIDR_EL0,
45+
}
46+
47+
reg_map_part = {
4048
"w0" : UC_ARM64_REG_W0,
4149
"w1" : UC_ARM64_REG_W1,
4250
"w2" : UC_ARM64_REG_W2,
@@ -68,9 +76,4 @@
6876
"w28" : UC_ARM64_REG_W28,
6977
"w29" : UC_ARM64_REG_W29,
7078
"w30" : UC_ARM64_REG_W30,
71-
"sp": UC_ARM64_REG_SP,
72-
"pc": UC_ARM64_REG_PC,
73-
"lr": UC_ARM64_REG_LR,
74-
"cpacr_el1": UC_ARM64_REG_CPACR_EL1,
75-
"tpidr_el0": UC_ARM64_REG_TPIDR_EL0,
7679
}

‎qiling/arch/register.py‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -107,6 +107,9 @@ def arch_pc(self):
107107
def arch_pc(self, value):
108108
return self.ql.uc.reg_write(self.uc_pc, value)
109109

110+
@property
111+
def arch_pc_name(self):
112+
return self.ql.reg.reverse_mapping[self.uc_pc]
110113

111114
@property
112115
def arch_sp(self):

‎qiling/arch/x86.py‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ def __init__(self, ql):
7070

7171
x64_register_mappings = [
7272
reg_map_8, reg_map_16, reg_map_32, reg_map_64,
73-
reg_map_cr, reg_map_st, reg_map_misc
73+
reg_map_cr, reg_map_st, reg_map_misc, reg_map_part
7474
]
7575

7676
for reg_maper in x64_register_mappings:

‎qiling/arch/x86_const.py‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,9 @@
104104
"r14": UC_X86_REG_R14,
105105
"r15": UC_X86_REG_R15,
106106
"rip": UC_X86_REG_RIP,
107+
}
108+
109+
reg_map_part = {
107110
"r8b": UC_X86_REG_R8B,
108111
"r9b": UC_X86_REG_R9B,
109112
"r10b": UC_X86_REG_R10B,

‎qiling/debugger/gdb/gdb.py‎

Lines changed: 24 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -403,44 +403,48 @@ def handle_p(subcmd):
403403
def handle_P(subcmd):
404404
reg_index, reg_data = subcmd.split('=')
405405
reg_index = int(reg_index, 16)
406+
reg_name = self.tables[self.ql.archtype][reg_index]
406407

407408
if self.ql.archtype== QL_ARCH.A8086:
408409
reg_data = int(reg_data, 16)
409410
reg_data = int.from_bytes(struct.pack('<I', reg_data), byteorder='big')
410-
self.ql.reg.write(self.tables[QL_ARCH.A8086][reg_index], reg_data)
411+
self.ql.reg.write(reg_name, reg_data)
411412

412413
elif self.ql.archtype== QL_ARCH.X86:
413414
reg_data = int(reg_data, 16)
414415
reg_data = int.from_bytes(struct.pack('<I', reg_data), byteorder='big')
415-
self.ql.reg.write(self.tables[QL_ARCH.X86][reg_index], reg_data)
416+
self.ql.reg.write(reg_name, reg_data)
416417

417418
elif self.ql.archtype== QL_ARCH.X8664:
418419
if reg_index <= 17:
419420
reg_data = int(reg_data, 16)
420421
reg_data = int.from_bytes(struct.pack('<Q', reg_data), byteorder='big')
421-
self.ql.reg.write(self.tables[QL_ARCH.X8664][reg_index], reg_data)
422+
self.ql.reg.write(reg_name, reg_data)
422423
else:
423424
reg_data = int(reg_data[:8], 16)
424425
reg_data = int.from_bytes(struct.pack('<I', reg_data), byteorder='big')
425-
self.ql.reg.write(self.tables[QL_ARCH.X8664][reg_index], reg_data)
426+
self.ql.reg.write(reg_name, reg_data)
426427

427428
elif self.ql.archtype== QL_ARCH.ARM:
428429
reg_data = int(reg_data, 16)
429430
reg_data = int.from_bytes(struct.pack('<I', reg_data), byteorder='big')
430-
self.ql.reg.write(self.tables[QL_ARCH.ARM][reg_index], reg_data)
431+
self.ql.reg.write(reg_name, reg_data)
431432

432433
elif self.ql.archtype== QL_ARCH.ARM64:
433434
reg_data = int(reg_data, 16)
434435
reg_data = int.from_bytes(struct.pack('<Q', reg_data), byteorder='big')
435-
self.ql.reg.write(self.tables[QL_ARCH.ARM64][reg_index], reg_data)
436+
self.ql.reg.write(reg_name, reg_data)
436437

437438
elif self.ql.archtype== QL_ARCH.MIPS:
438439
reg_data = int(reg_data, 16)
439440
if self.ql.archendian == QL_ENDIAN.EL:
440441
reg_data = int.from_bytes(struct.pack('<I', reg_data), byteorder='little')
441442
else:
442443
reg_data = int.from_bytes(struct.pack('<I', reg_data), byteorder='big')
443-
self.ql.reg.write(self.tables[QL_ARCH.MIPS][reg_index], reg_data)
444+
self.ql.reg.write(reg_name, reg_data)
445+
446+
if reg_name == self.ql.reg.arch_pc_name:
447+
self.gdb.current_address = reg_data
444448

445449
logging.info("gdb> Write to register %s with %x\n" % (self.tables[self.ql.archtype][reg_index], reg_data))
446450
self.send('OK')
@@ -462,6 +466,9 @@ def handle_Q(subcmd):
462466
elif subcmd.startswith('PassSignals'):
463467
self.send('OK')
464468

469+
elif subcmd.startswith('qemu'):
470+
self.send('')
471+
465472
def handle_D(subcmd):
466473
self.send('OK')
467474

@@ -479,9 +486,9 @@ def handle_q(subcmd):
479486
xfercmd_file = os.path.join(xfercmd_abspath,"xml",xml_folder, xfercmd_file)
480487

481488
if os.path.exists(xfercmd_file) and self.ql.ostype is not QL_OS.WINDOWS:
482-
f = open(xfercmd_file, 'r')
483-
file_contents = f.read()
484-
self.send("l%s" % file_contents)
489+
with open(xfercmd_file, 'r') as f:
490+
file_contents = f.read()
491+
self.send("l%s" % file_contents)
485492
else:
486493
logging.info("gdb> Platform is not supported by xml or xml file not found: %s\n" % (xfercmd_file))
487494
self.send("l")
@@ -522,7 +529,7 @@ def handle_q(subcmd):
522529
AT_HWCAP2 = "0000000000000000"
523530
ID_AT_EXECFN = "1f00000000000000"
524531
AT_EXECFN = "0000000000000000" # File name of executable
525-
ID_AT_PLATFORM = "f000000000000000"
532+
ID_AT_PLATFORM = "0f00000000000000"
526533
ID_AT_NULL = "0000000000000000"
527534
AT_NULL = "0000000000000000"
528535

@@ -550,7 +557,7 @@ def handle_q(subcmd):
550557
AT_HWCAP2 = "00000000"
551558
ID_AT_EXECFN = "1f000000"
552559
AT_EXECFN = "00000000" # File name of executable
553-
ID_AT_PLATFORM = "f0000000"
560+
ID_AT_PLATFORM = "0f000000"
554561
ID_AT_NULL = "00000000"
555562
AT_NULL = "00000000"
556563

@@ -758,6 +765,10 @@ def handle_s(subcmd):
758765
self.send('S%.2x' % GDB_SIGNAL_TRAP)
759766

760767

768+
def handle_X(subcmd):
769+
self.send('')
770+
771+
761772
def handle_Z(subcmd):
762773
data = subcmd
763774
ztype = data[data.find('Z') + 1:data.find(',')]
@@ -807,6 +818,7 @@ def handle_exclaim(subcmd):
807818
'Q': handle_Q,
808819
's': handle_s,
809820
'v': handle_v,
821+
'X': handle_X,
810822
'Z': handle_Z,
811823
'z': handle_z
812824
}

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