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linux-yocto-dev: qcm6490: sc7280 lpass audio clock driver
Update the low pass audio clock controller driver for reset functionality. Signed-off-by: Jorge Ramirez-Ortiz <[email protected]>
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‎recipes-kernel/linux/linux-yocto-dev.bbappend‎

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@@ -13,6 +13,9 @@ SRC_URI:append:qcom = " \
1313
file://qcm6490-board-dts/0002-arm64-dts-qcom-qcs6490-rb3gen2-vision-mezzanine-Add-.patch \
1414
file://qcm6490-board-dts/0002-media-dt-bindings-update-clocks-for-sc7280-camss.patch \
1515
file://qcm6490-board-dts/0001-PENDING-enable-xHCI.patch \
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file://qcm6490-board-dts/0001-dt-bindings-clock-qcom-Add-compatible-for.patch \
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file://qcm6490-board-dts/0002-arm64-dts-qcom-qcm6490-idp-Update-the-LPASS.patch \
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file://qcm6490-board-dts/0003-arm64-dts-qcom-qcs6490-rb3gen2-Update-the-LPASS-audi.patch \
1619
file://workarounds/0001-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch \
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file://workarounds/0001-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch \
1821
file://drivers/0003-PCI-Add-new-start_link-stop_link-function-ops.patch \
@@ -22,6 +25,7 @@ SRC_URI:append:qcom = " \
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file://drivers/0007-PCI-PCI-Add-pcie_is_link_active-to-determine-if-the-.patch \
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file://drivers/0008-PCI-pwrctrl-Add-power-control-driver-for-tc956x.patch \
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file://drivers/0001-media-qcom-camss-update-clock-names-for-sc7280.patch \
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file://drivers/0004-clk-qcom-lpassaudiocc-sc7280-Add-support-for-LPASS-r.patch \
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"
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# Include additional kernel configs.

‎recipes-kernel/linux/linux-yocto-dev/drivers/0004-clk-qcom-lpassaudiocc-sc7280-Add-support-for-LPASS-r.patch‎

Lines changed: 89 additions & 0 deletions
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@@ -0,0 +1,89 @@
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From a475928e65aa6808a9fdd56b8612f355b3c16c67 Mon Sep 17 00:00:00 2001
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From: Taniya Das <[email protected]>
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Date: Sat, 22 Feb 2025 09:17:15 +0100
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Subject: [PATCH 4/4] clk: qcom: lpassaudiocc-sc7280: Add support for LPASS
5+
resets for QCM6490
6+
7+
On the QCM6490 boards, the LPASS firmware controls the complete clock
8+
controller functionalities and associated power domains. However, only
9+
the LPASS resets required to be controlled by the high level OS. Thus,
10+
add support for the resets in the clock driver to enable the Audio SW
11+
driver to assert/deassert the audio resets as needed.
12+
13+
Reviewed-by: Dmitry Baryshkov <[email protected]>
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Signed-off-by: Taniya Das <[email protected]>
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Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
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---
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drivers/clk/qcom/lpassaudiocc-sc7280.c | 23 +++++++++++++++++++----
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1 file changed, 19 insertions(+), 4 deletions(-)
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diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c
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index 45e726477086..22169da08a51 100644
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--- a/drivers/clk/qcom/lpassaudiocc-sc7280.c
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+++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c
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@@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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+ * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/clk-provider.h>
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@@ -713,14 +714,24 @@ static const struct qcom_reset_map lpass_audio_cc_sc7280_resets[] = {
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[LPASS_AUDIO_SWR_WSA_CGCR] = { 0xb0, 1 },
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};
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+static const struct regmap_config lpass_audio_cc_sc7280_reset_regmap_config = {
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+ .name = "lpassaudio_cc_reset",
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+ .reg_bits = 32,
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+ .reg_stride = 4,
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+ .val_bits = 32,
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+ .fast_io = true,
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+ .max_register = 0xc8,
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+};
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+
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static const struct qcom_cc_desc lpass_audio_cc_reset_sc7280_desc = {
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- .config = &lpass_audio_cc_sc7280_regmap_config,
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+ .config = &lpass_audio_cc_sc7280_reset_regmap_config,
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.resets = lpass_audio_cc_sc7280_resets,
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.num_resets = ARRAY_SIZE(lpass_audio_cc_sc7280_resets),
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};
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static const struct of_device_id lpass_audio_cc_sc7280_match_table[] = {
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- { .compatible = "qcom,sc7280-lpassaudiocc" },
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+ { .compatible = "qcom,qcm6490-lpassaudiocc", .data = &lpass_audio_cc_reset_sc7280_desc },
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+ { .compatible = "qcom,sc7280-lpassaudiocc", .data = &lpass_audio_cc_sc7280_desc },
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{ }
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};
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MODULE_DEVICE_TABLE(of, lpass_audio_cc_sc7280_match_table);
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@@ -752,13 +763,17 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev)
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struct regmap *regmap;
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int ret;
62+
63+
+ desc = device_get_match_data(&pdev->dev);
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+
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+ if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcm6490-lpassaudiocc"))
66+
+ return qcom_cc_probe_by_index(pdev, 1, desc);
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+
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ret = lpass_audio_setup_runtime_pm(pdev);
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if (ret)
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return ret;
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lpass_audio_cc_sc7280_regmap_config.name = "lpassaudio_cc";
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lpass_audio_cc_sc7280_regmap_config.max_register = 0x2f000;
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- desc = &lpass_audio_cc_sc7280_desc;
75+
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regmap = qcom_cc_map(pdev, desc);
77+
if (IS_ERR(regmap)) {
78+
@@ -772,7 +787,7 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev)
79+
regmap_write(regmap, 0x4, 0x3b);
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regmap_write(regmap, 0x8, 0xff05);
81+
82+
- ret = qcom_cc_really_probe(&pdev->dev, &lpass_audio_cc_sc7280_desc, regmap);
83+
+ ret = qcom_cc_really_probe(&pdev->dev, desc, regmap);
84+
if (ret) {
85+
dev_err(&pdev->dev, "Failed to register LPASS AUDIO CC clocks\n");
86+
goto exit;
87+
--
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2.34.1
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‎recipes-kernel/linux/linux-yocto-dev/qcm6490-board-dts/0001-dt-bindings-clock-qcom-Add-compatible-for.patch‎

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@@ -0,0 +1,43 @@
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From d6e1925bc276590b40943d233cf198a64fb9bd19 Mon Sep 17 00:00:00 2001
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From: Taniya Das <[email protected]>
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Date: Wed, 5 Mar 2025 16:19:25 +0100
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Subject: [PATCH 1/4] dt-bindings: clock: qcom: Add compatible for
5+
6+
On the QCM6490 boards, the LPASS firmware controls the complete clock
7+
controller functionalities and associated power domains. However, only
8+
the LPASS resets required to be controlled by the high level OS. Thus,
9+
add the new QCM6490 compatible to support the reset functionality for
10+
Low Power Audio subsystem.
11+
12+
Signed-off-by: Taniya Das <[email protected]>
13+
Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
14+
---
15+
.../devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 5 ++++-
16+
1 file changed, 4 insertions(+), 1 deletion(-)
17+
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diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
19+
index 488d63959424..99ab9106009f 100644
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--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
21+
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
22+
@@ -20,6 +20,7 @@ description: |
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properties:
24+
compatible:
25+
enum:
26+
+ - qcom,qcm6490-lpassaudiocc
27+
- qcom,sc7280-lpassaoncc
28+
- qcom,sc7280-lpassaudiocc
29+
- qcom,sc7280-lpasscorecc
30+
@@ -68,7 +69,9 @@ allOf:
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properties:
32+
compatible:
33+
contains:
34+
- const: qcom,sc7280-lpassaudiocc
35+
+ enum:
36+
+ - qcom,qcm6490-lpassaudiocc
37+
+ - qcom,sc7280-lpassaudiocc
38+
39+
then:
40+
properties:
41+
--
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2.34.1
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‎recipes-kernel/linux/linux-yocto-dev/qcm6490-board-dts/0002-arm64-dts-qcom-qcm6490-idp-Update-the-LPASS.patch‎

Lines changed: 33 additions & 0 deletions
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@@ -0,0 +1,33 @@
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From 1946a1cd6f785c856016a08ec23b76ba485ea6e6 Mon Sep 17 00:00:00 2001
2+
From: Taniya Das <[email protected]>
3+
Date: Sat, 22 Feb 2025 09:18:51 +0100
4+
Subject: [PATCH 2/4] arm64: dts: qcom: qcm6490-idp: Update the LPASS
5+
6+
Update the lpassaudio node to support the new compatible as the
7+
lpassaudio needs to support the reset functionality on the
8+
QCM6490 IDP board and the rest of the Audio functionality would be
9+
provided from the LPASS firmware.
10+
11+
Reviewed-by: Dmitry Baryshkov <[email protected]>
12+
Signed-off-by: Taniya Das <[email protected]>
13+
Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
14+
---
15+
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 5 +++++
16+
1 file changed, 5 insertions(+)
17+
18+
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
19+
index 391f1e9efc8b..8b7d67874fce 100644
20+
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
21+
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
22+
@@ -799,3 +799,8 @@ &wifi {
23+
24+
status = "okay";
25+
};
26+
+
27+
+&lpass_audiocc {
28+
+ compatible = "qcom,qcm6490-lpassaudiocc";
29+
+ /delete-property/ power-domains;
30+
+};
31+
--
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2.34.1
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‎recipes-kernel/linux/linux-yocto-dev/qcm6490-board-dts/0003-arm64-dts-qcom-qcs6490-rb3gen2-Update-the-LPASS-audi.patch‎

Lines changed: 34 additions & 0 deletions
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@@ -0,0 +1,34 @@
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From 0dcf3d16e8053e2c168b166a061782fa3f5bb06a Mon Sep 17 00:00:00 2001
2+
From: Taniya Das <[email protected]>
3+
Date: Wed, 5 Mar 2025 16:24:17 +0100
4+
Subject: [PATCH] arm64: dts: qcom: qcs6490-rb3gen2: Update the LPASS audio
5+
node
6+
7+
Update the lpassaudio node to support the new compatible as the
8+
lpassaudio needs to support the reset functionality on the
9+
QCS6490 RB3Gen2 board and the rest of the Audio functionality would be
10+
provided from the LPASS firmware.
11+
12+
Reviewed-by: Dmitry Baryshkov <[email protected]>
13+
Signed-off-by: Taniya Das <[email protected]>
14+
Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/[email protected]/]
15+
---
16+
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 +++++
17+
1 file changed, 5 insertions(+)
18+
19+
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
20+
index 13dbb24a3179..ecbb0373e2ab 100644
21+
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
22+
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
23+
@@ -1102,3 +1102,8 @@ sd_cd: sd-cd-state {
24+
bias-pull-up;
25+
};
26+
};
27+
+
28+
+&lpass_audiocc {
29+
+ compatible = "qcom,qcm6490-lpassaudiocc";
30+
+ /delete-property/ power-domains;
31+
+};
32+
--
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2.34.1
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