@@ -534,263 +534,6 @@ diff -Nru mesa-25.2.0-orig/debian/patches/path_max.diff mesa-25.2.0/debian/patch
534534 static int (*backends[])(struct pipe_loader_device **, int) = {
535535+ #ifdef HAVE_LIBDRM
536536+ &pipe_loader_drm_probe,
537- --- mesa-25.2.0-orig/debian/patches/35316.patch 2025-06-17 11:40:36.606796770 +0300
538- +++ mesa-25.2.0/debian/patches/35316.patch 2025-06-17 15:02:11.471138105 +0300
539- @@ -0,0 +1,254 @@
540- +From: Lakshman Chandu Kondreddy <
[email protected] >
541- +Subject: freedreno: Add sampling support for RGB/BGR 24-bit component texture formats
542- +Origin: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35316
543- +
544- +From e56ef6179653e0b5574d1b9648db25c9cf6e3a6e Mon Sep 17 00:00:00 2001
545- +From: "Petar G. Georgiev" <
[email protected] >
546- +Date: Mon, 12 May 2025 11:49:06 +0530
547- +Subject: [PATCH 1/4] util: Add pack and unpack for R8G8B8/B8G8R8
548- +
549- +This helps in packing and unpacking the R8G8B8/B8G8R8
550- +pipe formats which are of uint8 type.
551- +
552- +Signed-off-by: Petar G. Georgiev <
[email protected] >
553- +Signed-off-by: Lakshman Chandu Kondreddy <
[email protected] >
554- +---
555- + src/util/u_pack_color.h | 27 +++++++++++++++++++++++++++
556- + 1 file changed, 27 insertions(+)
557- +
558- +diff --git a/src/util/u_pack_color.h b/src/util/u_pack_color.h
559- +index 7d5bf7f35457f..b646729fda540 100644
560- +--- a/src/util/u_pack_color.h
561- ++++ b/src/util/u_pack_color.h
562- +@@ -94,6 +94,16 @@ util_pack_color_ub(uint8_t r, uint8_t g, uint8_t b, uint8_t a,
563- + uc->ui[0] = (b << 24) | (g << 16) | (r << 8) | 0xff;
564- + }
565- + return;
566- ++ case PIPE_FORMAT_R8G8B8_UNORM:
567- ++ {
568- ++ uc->ui[0] = (b << 16) | (g << 8) | r;
569- ++ }
570- ++ return;
571- ++ case PIPE_FORMAT_B8G8R8_UNORM:
572- ++ {
573- ++ uc->ui[0] = (r << 16) | (g << 8) | b;
574- ++ }
575- ++ return;
576- + case PIPE_FORMAT_B5G6R5_UNORM:
577- + {
578- + uc->us = ((r & 0xf8) << 8) | ((g & 0xfc) << 3) | (b >> 3);
579- +@@ -219,6 +229,23 @@ util_unpack_color_ub(enum pipe_format format, union util_color *uc,
580- + *a = (uint8_t) 0xff;
581- + }
582- + return;
583- ++ case PIPE_FORMAT_R8G8B8_UNORM:
584- ++ {
585- ++ uint32_t p = uc->ui[0];
586- ++ *r = (uint8_t) (p & 0xff);
587- ++ *g = (uint8_t) ((p >> 8) & 0xff);
588- ++ *b = (uint8_t) ((p >> 16) & 0xff);
589- ++ *a = (uint8_t) 0xff;
590- ++ }
591- ++ return;
592- ++ case PIPE_FORMAT_B8G8R8_UNORM:
593- ++ {
594- ++ uint32_t p = uc->ui[0];
595- ++ *r = (uint8_t) ((p >> 16) & 0xff);
596- ++ *g = (uint8_t) ((p >> 8) & 0xff);
597- ++ *b = (uint8_t) (p & 0xff);
598- ++ *a = (uint8_t) 0xff;
599- ++ }
600- + case PIPE_FORMAT_B5G6R5_UNORM:
601- + {
602- + uint16_t p = uc->us;
603- +--
604- +GitLab
605- +
606- +
607- +From cd56b02b49047b27a4942e8c0ab8302b94101d67 Mon Sep 17 00:00:00 2001
608- +From: Rob Clark <
[email protected] >
609- +Date: Wed, 25 Jun 2025 10:39:24 -0700
610- +Subject: [PATCH 2/4] freedreno/layout: Support for NPoT formats
611- +
612- +Three component formats don't get UBWC, but do get their pitch aligned
613- +to the next PoT size.
614- +
615- +Signed-off-by: Rob Clark <
[email protected] >
616- +---
617- + src/freedreno/fdl/fd6_layout.c | 55 +++++++++++++++++++++-------------
618- + 1 file changed, 35 insertions(+), 20 deletions(-)
619- +
620- +diff --git a/src/freedreno/fdl/fd6_layout.c b/src/freedreno/fdl/fd6_layout.c
621- +index f4d6adfcb4625..d4cd785f63afe 100644
622- +--- a/src/freedreno/fdl/fd6_layout.c
623- ++++ b/src/freedreno/fdl/fd6_layout.c
624- +@@ -139,16 +139,22 @@ fdl6_layout(struct fdl_layout *layout, const struct fd_dev_info *info,
625- + layout->layer_first = !is_3d;
626- + layout->is_mutable = is_mutable;
627- +
628- +- fdl6_get_ubwc_blockwidth(layout, &ubwc_blockwidth, &ubwc_blockheight);
629- +-
630- +- /* For simplicity support UBWC only for 3D images without mipmaps,
631- +- * most d3d11 games don't use mipmaps for 3D images.
632- +- */
633- +- if (depth0 > 1 && mip_levels > 1)
634- ++ if (!util_is_power_of_two_or_zero(layout->cpp)) {
635- ++ /* R8G8B8 and other 3 component formats don't get UBWC: */
636- ++ ubwc_blockwidth = ubwc_blockheight = 0;
637- + layout->ubwc = false;
638- ++ } else {
639- ++ fdl6_get_ubwc_blockwidth(layout, &ubwc_blockwidth, &ubwc_blockheight);
640- +
641- +- if (ubwc_blockwidth == 0)
642- +- layout->ubwc = false;
643- ++ /* For simplicity support UBWC only for 3D images without mipmaps,
644- ++ * most d3d11 games don't use mipmaps for 3D images.
645- ++ */
646- ++ if (depth0 > 1 && mip_levels > 1)
647- ++ layout->ubwc = false;
648- ++
649- ++ if (ubwc_blockwidth == 0)
650- ++ layout->ubwc = false;
651- ++ }
652- +
653- + assert(!force_ubwc || layout->ubwc);
654- +
655- +@@ -180,19 +186,28 @@ fdl6_layout(struct fdl_layout *layout, const struct fd_dev_info *info,
656- + } else {
657- + layout->base_align = 64;
658- + layout->pitchalign = 0;
659- +- /* align pitch to at least 16 pixels:
660- +- * both turnip and galium assume there is enough alignment for 16x4
661- +- * aligned gmem store. turnip can use CP_BLIT to work without this
662- +- * extra alignment, but gallium driver doesn't implement it yet
663- +- */
664- +- if (layout->cpp > 4)
665- +- layout->pitchalign = fdl_cpp_shift(layout) - 2;
666- +
667- +- /* when possible, use a bit more alignment than necessary
668- +- * presumably this is better for performance?
669- +- */
670- +- if (!explicit_layout)
671- +- layout->pitchalign = fdl_cpp_shift(layout);
672- ++ if (util_is_power_of_two_or_zero(layout->cpp)) {
673- ++ /* align pitch to at least 16 pixels:
674- ++ * both turnip and galium assume there is enough alignment for 16x4
675- ++ * aligned gmem store. turnip can use CP_BLIT to work without this
676- ++ * extra alignment, but gallium driver doesn't implement it yet
677- ++ */
678- ++ if (layout->cpp > 4)
679- ++ layout->pitchalign = fdl_cpp_shift(layout) - 2;
680- ++
681- ++ /* when possible, use a bit more alignment than necessary
682- ++ * presumably this is better for performance?
683- ++ */
684- ++ if (!explicit_layout)
685- ++ layout->pitchalign = fdl_cpp_shift(layout);
686- ++ } else {
687- ++ /* 3 component formats have pitch aligned as their counterpart
688- ++ * 4 component formats
689- ++ */
690- ++ layout->cpp_shift = ffs(util_next_power_of_two(layout->cpp)) - 1;
691- ++ layout->pitchalign = layout->cpp_shift;
692- ++ }
693- +
694- + /* not used, avoid "may be used uninitialized" warning */
695- + heightalign = 1;
696- +--
697- +GitLab
698- +
699- +
700- +From 2837d27c4dce134231fc583a8c0d45e0ba22fe23 Mon Sep 17 00:00:00 2001
701- +From: "Petar G. Georgiev" <
[email protected] >
702- +Date: Sat, 10 May 2025 01:04:49 +0530
703- +Subject: [PATCH 3/4] freedreno/fdl: Add support for RGB888/BGR888 pipe formats
704- + in render buffer creation
705- +
706- +This enables the rendering of RGB/BGR 24-bit format buffers directly
707- +onto the framebuffer. For RGB888, support already exists for vertex and
708- +texture formats, so render buffer format support has been added. For
709- +BGR888, support for vertex, texture, and render buffer formats has been
710- +added. The internal format chosen for both RGB888 and BGR888 is GL_RGB8.
711- +
712- +Change-Id: I0557389dba05d3b44d7b935f02683df17e41fbd2
713- +Signed-off-by: Petar G. Georgiev <
[email protected] >
714- +Signed-off-by: Lakshman Chandu Kondreddy <
[email protected] >
715- +---
716- + src/freedreno/fdl/fd6_format_table.c | 12 ++++++++----
717- + 1 file changed, 8 insertions(+), 4 deletions(-)
718- +
719- +diff --git a/src/freedreno/fdl/fd6_format_table.c b/src/freedreno/fdl/fd6_format_table.c
720- +index 55d42538debd5..994c15c120e61 100644
721- +--- a/src/freedreno/fdl/fd6_format_table.c
722- ++++ b/src/freedreno/fdl/fd6_format_table.c
723- +@@ -121,12 +121,16 @@ static const struct fd6_format formats[PIPE_FORMAT_COUNT] = {
724- + _TC(A4B4G4R4_UNORM, 4_4_4_4_UNORM, XYZW),
725- +
726- + /* 24-bit */
727- +- VT_(R8G8B8_UNORM, 8_8_8_UNORM, WZYX),
728- +- VT_(R8G8B8_SNORM, 8_8_8_SNORM, WZYX),
729- +- VT_(R8G8B8_UINT, 8_8_8_UINT, WZYX),
730- +- VT_(R8G8B8_SINT, 8_8_8_SINT, WZYX),
731- ++ VTC(R8G8B8_UNORM, 8_8_8_UNORM, WZYX),
732- ++ VTC(R8G8B8_SNORM, 8_8_8_SNORM, WZYX),
733- ++ VTC(R8G8B8_UINT, 8_8_8_UINT, WZYX),
734- ++ VTC(R8G8B8_SINT, 8_8_8_SINT, WZYX),
735- + V__(R8G8B8_USCALED, 8_8_8_UINT, WZYX),
736- + V__(R8G8B8_SSCALED, 8_8_8_SINT, WZYX),
737- ++ VTC(B8G8R8_UNORM, 8_8_8_UNORM, WXYZ),
738- ++ VTC(B8G8R8_SNORM, 8_8_8_SNORM, WXYZ),
739- ++ VTC(B8G8R8_UINT, 8_8_8_UINT, WXYZ),
740- ++ VTC(B8G8R8_SINT, 8_8_8_SINT, WXYZ),
741- +
742- + /* 32-bit */
743- + V__(R32_UNORM, 32_UNORM, WZYX),
744- +--
745- +GitLab
746- +
747- +
748- +From 31b49cf057c27f41a123e615092f00762caaf329 Mon Sep 17 00:00:00 2001
749- +From: "Petar G. Georgiev" <
[email protected] >
750- +Date: Sat, 10 May 2025 01:11:24 +0530
751- +Subject: [PATCH 4/4] freedreno/a6xx: Add support for some NPOT block size
752- + formats
753- +
754- +This enables support for sampler view and shader image for
755- +non power of two formats such as RGB888/BGR888.
756- +As the above mentioned formats are of 24 bit, block size
757- +for each format is 3. So added condition to check this.
758- +
759- +Change-Id: Ie48dfd4604ad9392fc655fd7a3b49c8c6a7a7229
760- +Co-Developed-by: Lakshman Chandu Kondreddy <
[email protected] >
761- +Signed-off-by: Petar G. Georgiev <
[email protected] >
762- +Signed-off-by: Lakshman Chandu Kondreddy <
[email protected] >
763- +---
764- + src/gallium/drivers/freedreno/a6xx/fd6_screen.cc | 13 ++++++++-----
765- + 1 file changed, 8 insertions(+), 5 deletions(-)
766- +
767- +diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc b/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc
768- +index 0b593cef4f4df..3f7387b6c345d 100644
769- +--- a/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc
770- ++++ b/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc
771- +@@ -67,11 +67,14 @@ fd6_screen_is_format_supported(struct pipe_screen *pscreen,
772- + bool has_color = fd6_color_format(format, TILE6_LINEAR) != FMT6_NONE;
773- + bool has_tex = fd6_texture_format_supported(screen->info, format, TILE6_LINEAR, false);
774- +
775- +- if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
776- +- has_tex &&
777- +- (target == PIPE_BUFFER ||
778- +- util_is_power_of_two_or_zero(util_format_get_blocksize(format)))) {
779- +- retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
780- ++ if ((usage & PIPE_BIND_SHADER_IMAGE) && has_tex &&
781- ++ (target == PIPE_BUFFER || (util_format_get_blocksize(format) == 3)
782- ++ || util_is_power_of_two_or_zero(util_format_get_blocksize(format)))) {
783- ++ retval |= usage & PIPE_BIND_SHADER_IMAGE;
784- ++ }
785- ++
786- ++ if ((usage & PIPE_BIND_SAMPLER_VIEW) && has_tex) {
787- ++ retval |= usage & PIPE_BIND_SAMPLER_VIEW;
788- + }
789- +
790- + if (usage & PIPE_BIND_SHADER_IMAGE) {
791- +--
792- +GitLab
793- +
794537diff -Nru mesa-25.2.0-orig/debian/patches/series mesa-25.2.0/debian/patches/series
795538--- mesa-25.2.0-orig/debian/patches/series 2025-06-17 14:44:27.640967846 +0300
796539+++ mesa-25.2.0/debian/patches/series 2025-06-17 14:45:04.690440415 +0300
@@ -799,4 +542,3 @@ diff -Nru mesa-25.2.0-orig/debian/patches/series mesa-25.2.0/debian/patches/seri
799542 disable_ppc64el_assembly.diff
800543 drisw-Avoid-crashing-when-swrast_loader-NULL.patch
801544-etnaviv-add-support-for-texelfetch.patch
802- +35316.patch
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