diff --git a/overlay-debs/mesa-ew25/mesa_25.0.1-1qcom1.debdiff b/overlay-debs/mesa-ew25/mesa_25.0.1-1qcom1.debdiff deleted file mode 100644 index 38e6de85..00000000 --- a/overlay-debs/mesa-ew25/mesa_25.0.1-1qcom1.debdiff +++ /dev/null @@ -1,89 +0,0 @@ -diff -Nru mesa-25.0.1/debian/changelog mesa-25.0.1/debian/changelog ---- mesa-25.0.1/debian/changelog 2025-03-06 11:07:00.000000000 +0000 -+++ mesa-25.0.1/debian/changelog 2025-03-06 18:13:37.000000000 +0000 -@@ -1,3 +1,11 @@ -+mesa (25.0.1-1qcom1) unstable; urgency=medium -+ -+ * patches: add fd_dev_gpu_id-bail-out-on-unsupported-GPU-ids; fixes segfault -+ when trying to use the (currently unsupported GPU) on Qualcomm RB1; from -+ upstream gitlab's MR #33830. -+ -+ -- Loïc Minier Thu, 06 Mar 2025 18:13:37 +0000 -+ - mesa (25.0.1-1) unstable; urgency=medium - - [ Timo Aaltonen ] -diff -Nru mesa-25.0.1/debian/patches/fd_dev_gpu_id-bail-out-on-unsupported-GPU-ids.diff mesa-25.0.1/debian/patches/fd_dev_gpu_id-bail-out-on-unsupported-GPU-ids.diff ---- mesa-25.0.1/debian/patches/fd_dev_gpu_id-bail-out-on-unsupported-GPU-ids.diff 1970-01-01 00:00:00.000000000 +0000 -+++ mesa-25.0.1/debian/patches/fd_dev_gpu_id-bail-out-on-unsupported-GPU-ids.diff 2025-03-06 18:12:57.000000000 +0000 -@@ -0,0 +1,62 @@ -+From a255790e7e62904a5470a1edf6fc8aea5d7cc209 Mon Sep 17 00:00:00 2001 -+From: =?UTF-8?q?Lo=C3=AFc=20Minier?= -+Date: Fri, 28 Feb 2025 20:12:11 +0000 -+Subject: [PATCH] fd_dev_gpu_id: bail out on unsupported GPU ids -+MIME-Version: 1.0 -+Content-Type: text/plain; charset=UTF-8 -+Content-Transfer-Encoding: 8bit -+ -+Signed-off-by: Loïc Minier -+--- -+ src/freedreno/common/freedreno_dev_info.h | 9 +++++++++ -+ src/freedreno/drm/freedreno_pipe.c | 7 +++++++ -+ 2 files changed, 16 insertions(+) -+ -+diff --git a/src/freedreno/common/freedreno_dev_info.h b/src/freedreno/common/freedreno_dev_info.h -+index b925d778bb5..a3858bc20c3 100644 -+--- a/src/freedreno/common/freedreno_dev_info.h -++++ b/src/freedreno/common/freedreno_dev_info.h -+@@ -9,6 +9,7 @@ -+ -+ #include -+ #include -++#include -+ #include -+ -+ #ifdef __cplusplus -+@@ -379,6 +380,14 @@ fd_dev_gpu_id(const struct fd_dev_id *id) -+ /* Unmodified dev info as defined in freedreno_devices.py */ -+ const struct fd_dev_info *fd_dev_info_raw(const struct fd_dev_id *id); -+ -++/* Helper to check if GPU is known before going any further */ -++static uint8_t -++fd_dev_is_supported(const struct fd_dev_id *id) { -++ assert(id); -++ assert(id->gpu_id || id->chip_id); -++ return fd_dev_info_raw(id) != NULL; -++} -++ -+ /* Final dev info with dbg options and everything else applied. */ -+ const struct fd_dev_info fd_dev_info(const struct fd_dev_id *id); -+ -+diff --git a/src/freedreno/drm/freedreno_pipe.c b/src/freedreno/drm/freedreno_pipe.c -+index ab53c55152d..8373488368a 100644 -+--- a/src/freedreno/drm/freedreno_pipe.c -++++ b/src/freedreno/drm/freedreno_pipe.c -+@@ -45,6 +45,13 @@ fd_pipe_new2(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio) -+ fd_pipe_get_param(pipe, FD_CHIP_ID, &val); -+ pipe->dev_id.chip_id = val; -+ -++ if (!fd_dev_is_supported(&pipe->dev_id)) { -++ ERROR_MSG("unsupported GPU id 0x%" PRIx32 " / chip id 0x%" PRIx64, -++ pipe->dev_id.gpu_id, -++ pipe->dev_id.chip_id); -++ return NULL; -++ } -++ -+ pipe->is_64bit = fd_dev_64b(&pipe->dev_id); -+ -+ /* Use the _NOSYNC flags because we don't want the control_mem bo to hold -+-- -+2.47.2 -+ -diff -Nru mesa-25.0.1/debian/patches/series mesa-25.0.1/debian/patches/series ---- mesa-25.0.1/debian/patches/series 2025-03-06 11:00:09.000000000 +0000 -+++ mesa-25.0.1/debian/patches/series 2025-03-06 18:12:57.000000000 +0000 -@@ -1,3 +1,4 @@ - path_max.diff - src_glx_dri_common.h.diff - disable_ppc64el_assembly.diff -+fd_dev_gpu_id-bail-out-on-unsupported-GPU-ids.diff diff --git a/overlay-debs/mesa-ew25/mesa_25.0.1-1qcom1.yaml b/overlay-debs/mesa-ew25/mesa_25.0.1-1qcom1.yaml deleted file mode 100644 index 8943d822..00000000 --- a/overlay-debs/mesa-ew25/mesa_25.0.1-1qcom1.yaml +++ /dev/null @@ -1,4 +0,0 @@ -dsc_url: "https://snapshot.debian.org/archive/debian/20250306T150220Z/pool/main/m/mesa/mesa_25.0.1-1.dsc" -dsc_sha256sum: "e17dd4ba98e958dd07c395ee679dac0448d1ec3d97ab6abc71b309eb0480e623" -debdiff_file: "mesa_25.0.1-1qcom1.debdiff" -suite: "trixie" diff --git a/overlay-debs/mesa-experimental/mesa_25.1.0-1qcom1.debdiff b/overlay-debs/mesa-experimental/mesa_25.1.0-1qcom1.debdiff deleted file mode 100644 index 7d113425..00000000 --- a/overlay-debs/mesa-experimental/mesa_25.1.0-1qcom1.debdiff +++ /dev/null @@ -1,539 +0,0 @@ -diff -Nru mesa-25.1.0/debian/changelog mesa-25.1.0/debian/changelog ---- mesa-25.1.0/debian/changelog 2025-05-19 13:10:14.000000000 +0000 -+++ mesa-25.1.0/debian/changelog 2025-05-29 17:16:02.000000000 +0000 -@@ -1,3 +1,11 @@ -+mesa (25.1.0-1qcom1) trixie; urgency=medium -+ -+ * New patch freedreno-Add-initial-A702-support, adds support for A702 -+ GPU used in Qualcomm QCM2290 / QRB2210 as well as in Qualcomm -+ SW5100 (SmartWatch). -+ -+ -- Loïc Minier Thu, 29 May 2025 17:16:02 +0000 -+ - mesa (25.1.0-1) experimental; urgency=medium - - * New upstream release. -diff -Nru mesa-25.1.0/debian/patches/freedreno-Add-initial-A702-support.patch mesa-25.1.0/debian/patches/freedreno-Add-initial-A702-support.patch ---- mesa-25.1.0/debian/patches/freedreno-Add-initial-A702-support.patch 1970-01-01 00:00:00.000000000 +0000 -+++ mesa-25.1.0/debian/patches/freedreno-Add-initial-A702-support.patch 2025-05-29 17:14:37.000000000 +0000 -@@ -0,0 +1,512 @@ -+From 2846db7a5d664ad6d7e0ffc93009031f6f0c26a8 Mon Sep 17 00:00:00 2001 -+From: Konrad Dybcio -+Date: Fri, 16 Feb 2024 20:50:59 +0100 -+Subject: [PATCH] freedreno: Add initial A702 support -+ -+A702 has been used in Qualcomm QCM2290 / QRB2210 as well as in Qualcomm -+SW5100 (SmartWatch). -+ -+Upstream-Status: Submitted [https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34867] -+ -+Co-developed-by: Konrad Dybcio -+Signed-off-by: Konrad Dybcio -+Co-developed-by: Craig Stout -+Signed-off-by: Dmitry Baryshkov -+Signed-off-by: Jose Quaresma -+--- -+ src/freedreno/common/freedreno_dev_info.h | 3 + -+ src/freedreno/common/freedreno_devices.py | 52 +++++++++++ -+ src/freedreno/registers/adreno/a6xx.xml | 2 +- -+ src/freedreno/vulkan/tu_cmd_buffer.cc | 3 +- -+ src/freedreno/vulkan/tu_device.cc | 18 ++-- -+ src/freedreno/vulkan/tu_formats.cc | 87 ++++++++++++++++++- -+ src/freedreno/vulkan/tu_image.cc | 4 + -+ src/freedreno/vulkan/tu_pipeline.cc | 8 +- -+ .../drivers/freedreno/a6xx/fd6_emit.cc | 2 +- -+ .../drivers/freedreno/a6xx/fd6_gmem.cc | 1 + -+ .../drivers/freedreno/a6xx/fd6_rasterizer.cc | 5 +- -+ .../drivers/freedreno/a6xx/fd6_resource.cc | 6 ++ -+ .../drivers/freedreno/a6xx/fd6_screen.cc | 18 ++++ -+ .../drivers/freedreno/freedreno_resource.c | 2 +- -+ .../drivers/freedreno/freedreno_screen.c | 10 ++- -+ 15 files changed, 197 insertions(+), 24 deletions(-) -+ -+diff --git a/src/freedreno/common/freedreno_dev_info.h b/src/freedreno/common/freedreno_dev_info.h -+index 6b20f84506c..4b56f89d297 100644 -+--- a/src/freedreno/common/freedreno_dev_info.h -++++ b/src/freedreno/common/freedreno_dev_info.h -+@@ -219,6 +219,9 @@ struct fd_dev_info { -+ /* Whether the sad instruction (iadd3) is supported. */ -+ bool has_sad; -+ -++ /* A702 cuts A LOT of things.. */ -++ bool is_a702; -++ -+ struct { -+ uint32_t PC_POWER_CNTL; -+ uint32_t TPL1_DBG_ECO_CNTL; -+diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py -+index 6b41d22574d..6897e63c706 100644 -+--- a/src/freedreno/common/freedreno_devices.py -++++ b/src/freedreno/common/freedreno_devices.py -+@@ -825,6 +825,58 @@ add_gpus([ -+ ], -+ )) -+ -++add_gpus([ -++ GPUId(702), # KGSL -++ GPUId(chip_id=0x00b207002000, name="FD702"), # QRB2210 RB1 -++ GPUId(chip_id=0xffff07002000, name="FD702"), # Default no-speedbin fallback -++ ], A6xxGPUInfo( -++ CHIP.A6XX, # NOT a mistake! -++ [a6xx_base, A6XXProps( -++ reg_size_vec4 = 48, -++ instr_cache_size = 64, -++ indirect_draw_wfm_quirk = True, -++ has_cp_reg_write = False, -++ depth_bounds_require_depth_test_quirk = True, -++ has_gmem_fast_clear = True, -++ has_hw_multiview = False, -++ has_sampler_minmax = False, -++ has_lpac = False, -++ has_fs_tex_prefetch = False, -++ sysmem_per_ccu_depth_cache_size = 128 * 1024, # ?????? -++ sysmem_per_ccu_color_cache_size = 128 * 1024, # ?????? -++ gmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value, -++ vs_max_inputs_count = 16, -++ prim_alloc_threshold = 0x1, -++ storage_16bit = True, -++ is_a702 = True, -++ ) -++ ], -++ num_ccu = 1, -++ tile_align_w = 32, -++ tile_align_h = 16, -++ num_vsc_pipes = 16, -++ cs_shared_mem_size = 16 * 1024, -++ wave_granularity = 1, -++ fibers_per_sp = 128 * 16, -++ threadsize_base = 16, -++ max_waves = 32, -++ magic_regs = dict( -++ PC_POWER_CNTL = 0, -++ TPL1_DBG_ECO_CNTL = 0x8000, -++ GRAS_DBG_ECO_CNTL = 0, -++ SP_CHICKEN_BITS = 0x1400, -++ UCHE_CLIENT_PF = 0x84, -++ PC_MODE_CNTL = 0xf, -++ SP_DBG_ECO_CNTL = 0x0, -++ RB_DBG_ECO_CNTL = 0x100000, -++ RB_DBG_ECO_CNTL_blit = 0x100000, -++ HLSQ_DBG_ECO_CNTL = 0, -++ RB_UNKNOWN_8E01 = 0x1, -++ VPC_DBG_ECO_CNTL = 0x0, -++ UCHE_UNKNOWN_0E12 = 0x1, -++ ), -++ )) -++ -+ # Based on a6xx_base + a6xx_gen4 -+ a7xx_base = A6XXProps( -+ has_gmem_fast_clear = True, -+diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml -+index 17d26f49260..9aa117357fe 100644 -+--- a/src/freedreno/registers/adreno/a6xx.xml -++++ b/src/freedreno/registers/adreno/a6xx.xml -+@@ -4352,7 +4352,7 @@ to upconvert to 32b float internally? -+ -+ -+ -+- -++ -+ -+ -+ -+diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc -+index e0eb0849e80..af248cd06ac 100644 -+--- a/src/freedreno/vulkan/tu_cmd_buffer.cc -++++ b/src/freedreno/vulkan/tu_cmd_buffer.cc -+@@ -1209,6 +1209,7 @@ tu6_emit_tile_select(struct tu_cmd_buffer *cmd, -+ tu_cs_emit(cs, 0x0); -+ -+ tu_cs_emit_pkt7(cs, CP_SET_BIN_DATA5_OFFSET, abs_mask ? 5 : 4); -++ /* A702 also sets BIT(0) but that hangchecks */ -+ tu_cs_emit(cs, vsc->pipe_sizes[tile->pipe] | -+ CP_SET_BIN_DATA5_0_VSC_N(slot) | -+ CP_SET_BIN_DATA5_0_VSC_MASK(tile->slot_mask >> slot) | -+@@ -1455,7 +1456,7 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs) -+ tu_cs_emit_write_reg(cs, REG_A6XX_SP_DBG_ECO_CNTL, -+ phys_dev->info->a6xx.magic.SP_DBG_ECO_CNTL); -+ tu_cs_emit_write_reg(cs, REG_A6XX_SP_PERFCTR_ENABLE, 0x3f); -+- if (CHIP == A6XX) -++ if (CHIP == A6XX && !cs->device->physical_device->info->a6xx.is_a702) -+ tu_cs_emit_write_reg(cs, REG_A6XX_TPL1_UNKNOWN_B605, 0x44); -+ tu_cs_emit_write_reg(cs, REG_A6XX_TPL1_DBG_ECO_CNTL, -+ phys_dev->info->a6xx.magic.TPL1_DBG_ECO_CNTL); -+diff --git a/src/freedreno/vulkan/tu_device.cc b/src/freedreno/vulkan/tu_device.cc -+index dd79caf6927..844e563c8c1 100644 -+--- a/src/freedreno/vulkan/tu_device.cc -++++ b/src/freedreno/vulkan/tu_device.cc -+@@ -236,7 +236,7 @@ get_device_extensions(const struct tu_physical_device *device, -+ .KHR_shader_subgroup_rotate = true, -+ .KHR_shader_subgroup_uniform_control_flow = true, -+ .KHR_shader_terminate_invocation = true, -+- .KHR_spirv_1_4 = true, -++ .KHR_spirv_1_4 = device->info->a6xx.has_hw_multiview || TU_DEBUG(NOCONFORM), -+ .KHR_storage_buffer_storage_class = true, -+ #ifdef TU_USE_WSI_PLATFORM -+ .KHR_swapchain = true, -+@@ -324,7 +324,7 @@ get_device_extensions(const struct tu_physical_device *device, -+ #endif -+ .EXT_texel_buffer_alignment = true, -+ .EXT_tooling_info = true, -+- .EXT_transform_feedback = true, -++ .EXT_transform_feedback = !device->info->a6xx.is_a702, -+ .EXT_vertex_attribute_divisor = true, -+ .EXT_vertex_input_dynamic_state = true, -+ -+@@ -359,15 +359,15 @@ tu_get_features(struct tu_physical_device *pdevice, -+ features->fullDrawIndexUint32 = true; -+ features->imageCubeArray = true; -+ features->independentBlend = true; -+- features->geometryShader = true; -+- features->tessellationShader = true; -++ features->geometryShader = !pdevice->info->a6xx.is_a702; -++ features->tessellationShader = !pdevice->info->a6xx.is_a702; -+ features->sampleRateShading = true; -+ features->dualSrcBlend = true; -+ features->logicOp = true; -+ features->multiDrawIndirect = true; -+ features->drawIndirectFirstInstance = true; -+ features->depthClamp = true; -+- features->depthBiasClamp = true; -++ features->depthBiasClamp = !pdevice->info->a6xx.is_a702; -+ features->fillModeNonSolid = true; -+ features->depthBounds = true; -+ features->wideLines = pdevice->info->a6xx.line_width_max > 1.0; -+@@ -509,7 +509,7 @@ tu_get_features(struct tu_physical_device *pdevice, -+ features->indexTypeUint8 = true; -+ -+ /* VK_KHR_line_rasterization */ -+- features->rectangularLines = true; -++ features->rectangularLines = !pdevice->info->a6xx.is_a702; -+ features->bresenhamLines = true; -+ features->smoothLines = false; -+ features->stippledRectangularLines = false; -+@@ -617,7 +617,7 @@ tu_get_features(struct tu_physical_device *pdevice, -+ -+ /* VK_EXT_extended_dynamic_state3 */ -+ features->extendedDynamicState3PolygonMode = true; -+- features->extendedDynamicState3TessellationDomainOrigin = true; -++ features->extendedDynamicState3TessellationDomainOrigin = !pdevice->info->a6xx.is_a702; -+ features->extendedDynamicState3DepthClampEnable = true; -+ features->extendedDynamicState3DepthClipEnable = true; -+ features->extendedDynamicState3LogicOpEnable = true; -+@@ -626,7 +626,7 @@ tu_get_features(struct tu_physical_device *pdevice, -+ features->extendedDynamicState3AlphaToCoverageEnable = true; -+ features->extendedDynamicState3AlphaToOneEnable = true; -+ features->extendedDynamicState3DepthClipNegativeOneToOne = true; -+- features->extendedDynamicState3RasterizationStream = true; -++ features->extendedDynamicState3RasterizationStream = !pdevice->info->a6xx.is_a702; -+ features->extendedDynamicState3ConservativeRasterizationMode = -+ pdevice->vk.supported_extensions.EXT_conservative_rasterization; -+ features->extendedDynamicState3ExtraPrimitiveOverestimationSize = -+@@ -1059,7 +1059,7 @@ tu_get_properties(struct tu_physical_device *pdevice, -+ props->subPixelInterpolationOffsetBits = 4; -+ props->maxFramebufferWidth = (1 << 14); -+ props->maxFramebufferHeight = (1 << 14); -+- props->maxFramebufferLayers = (1 << 10); -++ props->maxFramebufferLayers = (1 << (pdevice->info->a6xx.is_a702 ? 8 : 10)); -+ props->framebufferColorSampleCounts = sample_counts; -+ props->framebufferDepthSampleCounts = sample_counts; -+ props->framebufferStencilSampleCounts = sample_counts; -+diff --git a/src/freedreno/vulkan/tu_formats.cc b/src/freedreno/vulkan/tu_formats.cc -+index cb134a979c6..56508f22834 100644 -+--- a/src/freedreno/vulkan/tu_formats.cc -++++ b/src/freedreno/vulkan/tu_formats.cc -+@@ -57,11 +57,92 @@ tu6_format_color(enum pipe_format format, enum a6xx_tile_mode tile_mode, -+ } -+ -+ static bool -+-tu6_format_texture_supported(enum pipe_format format) -++tu6_format_texture_supported(struct tu_physical_device *physical_device, enum pipe_format format) -+ { -++ if (physical_device->info->a6xx.is_a702) { -++ switch (format) { -++ case PIPE_FORMAT_RGTC1_UNORM: -++ case PIPE_FORMAT_RGTC1_SNORM: -++ case PIPE_FORMAT_RGTC2_UNORM: -++ case PIPE_FORMAT_RGTC2_SNORM: -++ case PIPE_FORMAT_BPTC_RGBA_UNORM: -++ case PIPE_FORMAT_BPTC_SRGBA: -++ case PIPE_FORMAT_BPTC_RGB_FLOAT: -++ case PIPE_FORMAT_BPTC_RGB_UFLOAT: -++ return false; -++ } -++ } -+ return fd6_texture_format(format, TILE6_LINEAR, false) != FMT6_NONE; -+ } -+ -++static bool -++tu_format_texture_linear_filtering_supported(struct tu_physical_device *physical_device, VkFormat vk_format) -++{ -++ if (physical_device->info->a6xx.is_a702) { -++ switch (vk_format) { -++ case VK_FORMAT_D16_UNORM: -++ case VK_FORMAT_D24_UNORM_S8_UINT: -++ case VK_FORMAT_X8_D24_UNORM_PACK32: -++ case VK_FORMAT_D32_SFLOAT: -++ case VK_FORMAT_D32_SFLOAT_S8_UINT: -++ case VK_FORMAT_R16_UNORM: -++ case VK_FORMAT_R16_SNORM: -++ case VK_FORMAT_R16_USCALED: -++ case VK_FORMAT_R16_SSCALED: -++ case VK_FORMAT_R16_UINT: -++ case VK_FORMAT_R16_SINT: -++ case VK_FORMAT_R16_SFLOAT: -++ case VK_FORMAT_R16G16_UNORM: -++ case VK_FORMAT_R16G16_SNORM: -++ case VK_FORMAT_R16G16_USCALED: -++ case VK_FORMAT_R16G16_SSCALED: -++ case VK_FORMAT_R16G16_UINT: -++ case VK_FORMAT_R16G16_SINT: -++ case VK_FORMAT_R16G16_SFLOAT: -++ case VK_FORMAT_R16G16B16_UNORM: -++ case VK_FORMAT_R16G16B16_SNORM: -++ case VK_FORMAT_R16G16B16_USCALED: -++ case VK_FORMAT_R16G16B16_SSCALED: -++ case VK_FORMAT_R16G16B16_UINT: -++ case VK_FORMAT_R16G16B16_SINT: -++ case VK_FORMAT_R16G16B16_SFLOAT: -++ case VK_FORMAT_R16G16B16A16_UNORM: -++ case VK_FORMAT_R16G16B16A16_SNORM: -++ case VK_FORMAT_R16G16B16A16_USCALED: -++ case VK_FORMAT_R16G16B16A16_SSCALED: -++ case VK_FORMAT_R16G16B16A16_UINT: -++ case VK_FORMAT_R16G16B16A16_SINT: -++ case VK_FORMAT_R16G16B16A16_SFLOAT: -++ case VK_FORMAT_R32_UINT: -++ case VK_FORMAT_R32_SINT: -++ case VK_FORMAT_R32_SFLOAT: -++ case VK_FORMAT_R32G32_UINT: -++ case VK_FORMAT_R32G32_SINT: -++ case VK_FORMAT_R32G32_SFLOAT: -++ case VK_FORMAT_R32G32B32_UINT: -++ case VK_FORMAT_R32G32B32_SINT: -++ case VK_FORMAT_R32G32B32_SFLOAT: -++ case VK_FORMAT_R32G32B32A32_UINT: -++ case VK_FORMAT_R32G32B32A32_SINT: -++ case VK_FORMAT_R32G32B32A32_SFLOAT: -++ case VK_FORMAT_R64_UINT: -++ case VK_FORMAT_R64_SINT: -++ case VK_FORMAT_R64_SFLOAT: -++ case VK_FORMAT_R64G64_UINT: -++ case VK_FORMAT_R64G64_SINT: -++ case VK_FORMAT_R64G64_SFLOAT: -++ case VK_FORMAT_R64G64B64_UINT: -++ case VK_FORMAT_R64G64B64_SINT: -++ case VK_FORMAT_R64G64B64_SFLOAT: -++ case VK_FORMAT_R64G64B64A64_UINT: -++ case VK_FORMAT_R64G64B64A64_SINT: -++ case VK_FORMAT_R64G64B64A64_SFLOAT: -++ return false; -++ } -++ } -++ return !vk_format_is_int(vk_format); -++} -++ -+ struct tu_native_format -+ tu6_format_texture(enum pipe_format format, enum a6xx_tile_mode tile_mode, -+ bool is_mutable) -+@@ -119,7 +200,7 @@ tu_physical_device_get_format_properties( -+ -+ bool supported_vtx = tu6_format_vtx_supported(format); -+ bool supported_color = tu6_format_color_supported(format); -+- bool supported_tex = tu6_format_texture_supported(format); -++ bool supported_tex = tu6_format_texture_supported(physical_device, format); -+ bool is_npot = !util_is_power_of_two_or_zero(desc->block.bits); -+ -+ if (format == PIPE_FORMAT_NONE || -+@@ -169,7 +250,7 @@ tu_physical_device_get_format_properties( -+ optimal |= VK_FORMAT_FEATURE_2_BLIT_SRC_BIT; -+ } -+ -+- if (!vk_format_is_int(vk_format)) { -++ if (tu_format_texture_linear_filtering_supported(physical_device, vk_format)) { -+ optimal |= VK_FORMAT_FEATURE_2_SAMPLED_IMAGE_FILTER_LINEAR_BIT; -+ -+ if (physical_device->vk.supported_extensions.EXT_filter_cubic) -+diff --git a/src/freedreno/vulkan/tu_image.cc b/src/freedreno/vulkan/tu_image.cc -+index a31b1847b6f..49b208f80f7 100644 -+--- a/src/freedreno/vulkan/tu_image.cc -++++ b/src/freedreno/vulkan/tu_image.cc -+@@ -341,6 +341,10 @@ ubwc_possible(struct tu_device *device, -+ uint32_t mip_levels, -+ bool use_z24uint_s8uint) -+ { -++ /* TODO: enable for a702 */ -++ if (info->a6xx.is_a702) -++ return false; -++ -+ /* no UBWC with compressed formats, E5B9G9R9, S8_UINT -+ * (S8_UINT because separate stencil doesn't have UBWC-enable bit) -+ */ -+diff --git a/src/freedreno/vulkan/tu_pipeline.cc b/src/freedreno/vulkan/tu_pipeline.cc -+index 9b4a63e6279..e12a60e3685 100644 -+--- a/src/freedreno/vulkan/tu_pipeline.cc -++++ b/src/freedreno/vulkan/tu_pipeline.cc -+@@ -3204,7 +3204,9 @@ tu6_rast_size(struct tu_device *dev, -+ bool per_view_viewport, -+ bool disable_fs) -+ { -+- if (CHIP == A6XX) { -++ if (CHIP == A6XX && dev->physical_device->info->a6xx.is_a702) { -++ return 17; -++ } else if (CHIP == A6XX) { -+ return 15 + (dev->physical_device->info->a6xx.has_legacy_pipeline_shading_rate ? 8 : 0); -+ } else { -+ return 27; -+@@ -3254,9 +3256,9 @@ tu6_emit_rast(struct tu_cs *cs, -+ tu_cs_emit_regs(cs, -+ PC_POLYGON_MODE(CHIP, polygon_mode)); -+ -+- if (CHIP == A7XX) { -++ if (CHIP == A7XX || cs->device->physical_device->info->a6xx.is_a702) { -+ tu_cs_emit_regs(cs, -+- A7XX_VPC_POLYGON_MODE2(polygon_mode)); -++ A6XX_VPC_POLYGON_MODE2(polygon_mode)); -+ } -+ -+ tu_cs_emit_regs(cs, PC_RASTER_CNTL(CHIP, -+diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc -+index a0a2968f281..8e98ce79d62 100644 -+--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc -++++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc -+@@ -900,7 +900,7 @@ fd6_emit_static_regs(struct fd_context *ctx, struct fd_ringbuffer *ring) -+ WRITE(REG_A6XX_SP_FLOAT_CNTL, A6XX_SP_FLOAT_CNTL_F16_NO_INF); -+ WRITE(REG_A6XX_SP_DBG_ECO_CNTL, screen->info->a6xx.magic.SP_DBG_ECO_CNTL); -+ WRITE(REG_A6XX_SP_PERFCTR_ENABLE, 0x3f); -+- if (CHIP == A6XX) -++ if (CHIP == A6XX && !screen->info->a6xx.is_a702) -+ WRITE(REG_A6XX_TPL1_UNKNOWN_B605, 0x44); -+ WRITE(REG_A6XX_TPL1_DBG_ECO_CNTL, screen->info->a6xx.magic.TPL1_DBG_ECO_CNTL); -+ if (CHIP == A6XX) { -+diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc -+index 7cf9e35a9a0..6e37b1295bb 100644 -+--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc -++++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc -+@@ -1277,6 +1277,7 @@ fd6_emit_tile_prep(struct fd_batch *batch, const struct fd_tile *tile) -+ OUT_RING(ring, 0x0); -+ -+ OUT_PKT7(ring, CP_SET_BIN_DATA5, 7); -++ /* A702 also sets BIT(0) but that hangchecks */ -+ OUT_RING(ring, CP_SET_BIN_DATA5_0_VSC_SIZE(pipe->w * pipe->h) | -+ CP_SET_BIN_DATA5_0_VSC_N(tile->n)); -+ OUT_RELOC(ring, fd6_ctx->vsc_draw_strm, /* per-pipe draw-stream address */ -+diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.cc b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.cc -+index 1da50349f65..5e581c77fc9 100644 -+--- a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.cc -++++ b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.cc -+@@ -99,8 +99,9 @@ __fd6_setup_rasterizer_stateobj(struct fd_context *ctx, -+ OUT_REG(ring, A6XX_VPC_POLYGON_MODE(mode)); -+ OUT_REG(ring, PC_POLYGON_MODE(CHIP, mode)); -+ -+- if (CHIP == A7XX) { -+- OUT_REG(ring, A7XX_VPC_POLYGON_MODE2(mode)); -++ if (CHIP == A7XX || -++ (CHIP == A6XX && ctx->screen->info->a6xx.is_a702)) { -++ OUT_REG(ring, A6XX_VPC_POLYGON_MODE2(mode)); -+ } -+ -+ /* With a7xx the hw doesn't do the clamping for us. When depth clamp -+diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc b/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc -+index ce735a974b5..463905cbee7 100644 -+--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc -++++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc -+@@ -28,6 +28,12 @@ ok_ubwc_format(struct pipe_screen *pscreen, enum pipe_format pfmt, unsigned nr_s -+ { -+ const struct fd_dev_info *info = fd_screen(pscreen)->info; -+ -++ /* -++ * TODO: no UBWC on a702? -++ */ -++ if (info->a6xx.is_a702) -++ return false; -++ -+ switch (pfmt) { -+ case PIPE_FORMAT_Z24X8_UNORM: -+ /* MSAA+UBWC does not work without FMT6_Z24_UINT_S8_UINT: */ -+diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc b/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc -+index 1b8ad6add26..56c98c51f8a 100644 -+--- a/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc -++++ b/src/gallium/drivers/freedreno/a6xx/fd6_screen.cc -+@@ -65,6 +65,24 @@ fd6_screen_is_format_supported(struct pipe_screen *pscreen, -+ -+ bool has_color = fd6_color_format(format, TILE6_LINEAR) != FMT6_NONE; -+ bool has_tex = fd6_texture_format(format, TILE6_LINEAR, false) != FMT6_NONE; -++ struct fd_screen *screen = fd_screen(pscreen); -++ -++ if (is_a6xx(screen) && screen->info->a6xx.is_a702) { -++ switch (format) { -++ case PIPE_FORMAT_RGTC1_UNORM: -++ case PIPE_FORMAT_RGTC1_SNORM: -++ case PIPE_FORMAT_RGTC2_UNORM: -++ case PIPE_FORMAT_RGTC2_SNORM: -++ case PIPE_FORMAT_BPTC_RGBA_UNORM: -++ case PIPE_FORMAT_BPTC_SRGBA: -++ case PIPE_FORMAT_BPTC_RGB_FLOAT: -++ case PIPE_FORMAT_BPTC_RGB_UFLOAT: -++ has_tex = false; -++ break; -++ default: -++ break; -++ } -++ } -+ -+ if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) && -+ has_tex && -+diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c -+index 4a1dc734d3c..f91964ad97e 100644 -+--- a/src/gallium/drivers/freedreno/freedreno_resource.c -++++ b/src/gallium/drivers/freedreno/freedreno_resource.c -+@@ -1302,7 +1302,7 @@ get_best_layout(struct fd_screen *screen, -+ return LINEAR; -+ } -+ -+- bool ubwc_ok = is_a6xx(screen); -++ bool ubwc_ok = is_a6xx(screen) && !screen->info->a6xx.is_a702; -+ if (FD_DBG(NOUBWC)) -+ ubwc_ok = false; -+ -+diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c -+index 2323d0dbfb3..9bac5af8c01 100644 -+--- a/src/gallium/drivers/freedreno/freedreno_screen.c -++++ b/src/gallium/drivers/freedreno/freedreno_screen.c -+@@ -213,6 +213,8 @@ fd_init_shader_caps(struct fd_screen *screen) -+ case PIPE_SHADER_GEOMETRY: -+ if (!is_a6xx(screen)) -+ continue; -++ if (screen->info->a6xx.is_a702) -++ continue; -+ break; -+ case PIPE_SHADER_COMPUTE: -+ if (!has_compute(screen)) -+@@ -485,11 +487,13 @@ fd_init_screen_caps(struct fd_screen *screen) -+ -+ caps->glsl_feature_level = -+ caps->glsl_feature_level_compatibility = -+- is_a6xx(screen) ? 460 : (is_ir3(screen) ? 140 : 120); -++ is_a6xx(screen) ? (screen->info->a6xx.is_a702 ? 140 : 460) : -++ (is_ir3(screen) ? 140 : 120); -+ -+ caps->essl_feature_level = -+- is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen) ? 320 : -+- (is_ir3(screen) ? 300 : 120); -++ (is_a6xx(screen) && screen->info->a6xx.is_a702) ? 310 : -++ (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen) ? 320 : -++ (is_ir3(screen) ? 300 : 120)); -+ -+ caps->shader_buffer_offset_alignment = -+ is_a6xx(screen) ? 64 : (is_a5xx(screen) || is_a4xx(screen) ? 4 : 0); -+-- -+2.49.0 -+ -diff -Nru mesa-25.1.0/debian/patches/series mesa-25.1.0/debian/patches/series ---- mesa-25.1.0/debian/patches/series 2025-05-19 10:54:55.000000000 +0000 -+++ mesa-25.1.0/debian/patches/series 2025-05-29 17:15:57.000000000 +0000 -@@ -3,3 +3,4 @@ - disable_ppc64el_assembly.diff - drisw-Avoid-crashing-when-swrast_loader-NULL.patch - etnaviv-add-support-for-texelfetch.patch -+freedreno-Add-initial-A702-support.patch diff --git a/overlay-debs/mesa-experimental/mesa_25.1.0-1qcom1.yaml b/overlay-debs/mesa-experimental/mesa_25.1.0-1qcom1.yaml deleted file mode 100644 index e4409244..00000000 --- a/overlay-debs/mesa-experimental/mesa_25.1.0-1qcom1.yaml +++ /dev/null @@ -1,4 +0,0 @@ -dsc_url: "https://snapshot.debian.org/archive/debian/20250519T203618Z/pool/main/m/mesa/mesa_25.1.0-1.dsc" -dsc_sha256sum: "d06c1b0ee300f096de2ac59a2e9583349ca79322612f4502baa5e78ff0be4290" -debdiff_file: "mesa_25.1.0-1qcom1.debdiff" -suite: "experimental" diff --git a/overlay-debs/mesa-experimental/mesa_25.2.0-1qcom1.debdiff b/overlay-debs/mesa-experimental/mesa_25.2.0-1qcom1.debdiff new file mode 100644 index 00000000..aaae660a --- /dev/null +++ b/overlay-debs/mesa-experimental/mesa_25.2.0-1qcom1.debdiff @@ -0,0 +1,157 @@ +diff -Nru mesa-25.2.0/debian/changelog mesa-25.2.0/debian/changelog +--- mesa-25.2.0/debian/changelog 2025-08-07 14:08:04.000000000 +0300 ++++ mesa-25.2.0/debian/changelog 2025-05-29 20:16:02.000000000 +0300 +@@ -1,3 +1,13 @@ ++mesa (25.2.0-1qcom1) trixie; urgency=medium ++ ++ * Rebuild for trixie. ++ * Switch to LLVM 19 (LLVM 20 is not a part of trixie) and also lower libdrm ++ dependency to the version present in trixie. ++ * Import patch from MR 36656 ("freedreno/layout: Don't align explicit ++ layouts to page size") ++ ++ -- Loïc Minier Thu, 29 May 2025 17:16:02 +0000 ++ + mesa (25.2.0-1) experimental; urgency=medium + + * New upstream release. +diff -Nru mesa-25.2.0/debian/control mesa-25.2.0/debian/control +--- mesa-25.2.0/debian/control 2025-08-07 14:08:04.000000000 +0300 ++++ mesa-25.2.0/debian/control 2025-05-29 20:16:02.000000000 +0300 +@@ -13,7 +13,7 @@ + meson (>= 1.7.0), + quilt, + pkgconf, +- libdrm-dev (>= 2.4.125-1), ++ libdrm-dev (>= 2.4.124-1), + libx11-dev, + libxxf86vm-dev, + libexpat1-dev, +@@ -47,11 +47,11 @@ + libelf-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], + libwayland-dev (>= 1.15.0) [linux-any], + libwayland-egl-backend-dev (>= 1.15.0) [linux-any], +- llvm-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], +- libclang-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], +- libclang-cpp20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], +- libclc-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], +- libclc-20 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], ++ llvm-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], ++ libclang-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], ++ libclang-cpp19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], ++ libclc-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], ++ libclc-19 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], + wayland-protocols (>= 1.38), + zlib1g-dev, + libglvnd-core-dev (>= 1.3.2), +@@ -60,8 +60,8 @@ + rustfmt [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], + bindgen (>= 0.71~) [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], + cbindgen [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], +- llvm-spirv-20 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], +- libllvmspirvlib-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], ++ llvm-spirv-19 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], ++ libllvmspirvlib-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], + librust-rustc-hash-2-dev [amd64 arm64 armhf i386 ppc64 riscv64 x32], + librust-paste-dev [amd64 arm64 armhf i386 ppc64 riscv64 x32], + librust-syn-dev (>= 2.0.48) [amd64 arm64 armhf i386 ppc64 riscv64 x32], +@@ -314,7 +314,7 @@ + Architecture: amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32 + Pre-Depends: ${misc:Pre-Depends} + Depends: +- libclc-20, ++ libclc-19, + ocl-icd-libopencl1 | libopencl1, + ${shlibs:Depends}, + ${misc:Depends}, +diff -Nru mesa-25.2.0/debian/control.in mesa-25.2.0/debian/control.in +--- mesa-25.2.0/debian/control.in 2025-08-07 13:05:05.000000000 +0300 ++++ mesa-25.2.0/debian/control.in 2025-05-29 20:16:02.000000000 +0300 +@@ -13,7 +13,7 @@ + meson (>= 1.7.0), + quilt, + pkgconf, +- libdrm-dev (>= 2.4.125-1), ++ libdrm-dev (>= 2.4.124-1), + libx11-dev, + libxxf86vm-dev, + libexpat1-dev, +diff -Nru mesa-25.2.0/debian/patches/36656.patch mesa-25.2.0/debian/patches/36656.patch +--- mesa-25.2.0/debian/patches/36656.patch 1970-01-01 02:00:00.000000000 +0200 ++++ mesa-25.2.0/debian/patches/36656.patch 2025-05-29 20:16:02.000000000 +0300 +@@ -0,0 +1,55 @@ ++From 8c59aacc10c1bdcb0b4febfe2b8068309516194d Mon Sep 17 00:00:00 2001 ++From: Rob Clark ++Date: Thu, 7 Aug 2025 15:09:45 -0700 ++Subject: [PATCH] freedreno/layout: Don't align explicit layouts to page size ++ ++This could cause importing buffers, in particular multiplanar YUV, since ++when the offset of the plane is added, the aligned size could be beyond ++the end of the buffer. ++ ++Fixes: 27b0f64b3ed0 ("freedreno/a6xx: Use handle for explicit layout") ++Signed-off-by: Rob Clark ++Part-of: ++--- ++ src/freedreno/ci/freedreno-a618-fails.txt | 11 ----------- ++ src/freedreno/fdl/fd6_layout.c | 2 +- ++ 2 files changed, 1 insertion(+), 12 deletions(-) ++ ++diff --git a/src/freedreno/ci/freedreno-a618-fails.txt b/src/freedreno/ci/freedreno-a618-fails.txt ++index c437bbfa9ba01..2f687d2aaf0a2 100644 ++--- a/src/freedreno/ci/freedreno-a618-fails.txt +++++ b/src/freedreno/ci/freedreno-a618-fails.txt ++@@ -226,17 +226,6 @@ spec@arb_base_instance@arb_base_instance-drawarrays,Fail ++ spec@ext_base_instance@arb_base_instance-baseinstance-doesnt-affect-gl-instance-id_gles3,Fail ++ spec@ext_base_instance@arb_base_instance-drawarrays_gles3,Fail ++ ++-# Bad assumptions in piglit about layout of multiplanar formats, ++-# it should use separate buffers per plane: ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-export,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_nv12,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_nv21,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_p010,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_p012,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_p016,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_yuv420,Fail ++-spec@ext_image_dma_buf_import@ext_image_dma_buf_import-sample_yvu420,Fail ++- ++ # Regression from https://gitlab.freedesktop.org/mesa/mesa/-/compare/ace49d9e52a6156f114ee00eec759d734bd84fc0...88c79a13b9056099048080e7d41576e0cb69c347 ++ spec@glsl-1.50@execution@variable-indexing@vs-output-array-vec2-index-wr-before-gs,Fail ++ spec@glsl-1.50@execution@variable-indexing@vs-output-array-vec3-index-wr-before-gs,Fail ++diff --git a/src/freedreno/fdl/fd6_layout.c b/src/freedreno/fdl/fd6_layout.c ++index d85f86b97cd61..dd32d470e4289 100644 ++--- a/src/freedreno/fdl/fd6_layout.c +++++ b/src/freedreno/fdl/fd6_layout.c ++@@ -317,7 +317,7 @@ fdl6_layout_image(struct fdl_layout *layout, const struct fd_dev_info *info, ++ } ++ } ++ ++- if (layout->layer_first) { +++ if (layout->layer_first && !explicit_layout) { ++ layout->layer_size = align64(layout->size, 4096); ++ layout->size = layout->layer_size * params->array_size; ++ } ++-- ++GitLab ++ +diff -Nru mesa-25.2.0/debian/patches/series mesa-25.2.0/debian/patches/series +--- mesa-25.2.0/debian/patches/series 2025-08-07 12:15:38.000000000 +0300 ++++ mesa-25.2.0/debian/patches/series 2025-05-29 20:16:02.000000000 +0300 +@@ -1,3 +1,4 @@ + path_max.diff + src_glx_dri_common.h.diff + disable_ppc64el_assembly.diff ++36656.patch +diff -Nru mesa-25.2.0/debian/rules mesa-25.2.0/debian/rules +--- mesa-25.2.0/debian/rules 2025-08-07 14:06:33.000000000 +0300 ++++ mesa-25.2.0/debian/rules 2025-05-29 20:16:02.000000000 +0300 +@@ -13,7 +13,7 @@ + DEB_HOST_ARCH_CPU ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_CPU) + + # for finding the correct llvm-config when meson doesn't know about it yet +-LLVM_VERSION = 20 ++LLVM_VERSION = 19 + export PATH:=/usr/lib/llvm-$(LLVM_VERSION)/bin/:$(PATH) + + export DEB_BUILD_MAINT_OPTIONS=optimize=-lto diff --git a/overlay-debs/mesa-experimental/mesa_25.2.0-1qcom1.yaml b/overlay-debs/mesa-experimental/mesa_25.2.0-1qcom1.yaml new file mode 100644 index 00000000..39e99c25 --- /dev/null +++ b/overlay-debs/mesa-experimental/mesa_25.2.0-1qcom1.yaml @@ -0,0 +1,4 @@ +dsc_url: "https://snapshot.debian.org/archive/debian-debug/20250807T142636Z/pool/main/m/mesa/mesa_25.2.0-1.dsc" +dsc_sha256sum: "c7d9cc46809e13a71a0c31533acac68ae343849b22886f63ad1b4fc4b6c8cc4d" +debdiff_file: "mesa_25.2.0-1qcom1.debdiff" +suite: "trixie" diff --git a/overlay-debs/mesa-snapshot/mesa-snapshot.sh b/overlay-debs/mesa-snapshot/mesa-snapshot.sh deleted file mode 100755 index 3957d6da..00000000 --- a/overlay-debs/mesa-snapshot/mesa-snapshot.sh +++ /dev/null @@ -1,71 +0,0 @@ -#! /bin/sh -# -# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. -# SPDX-License-Identifier: BSD-3-Clause - -COMMIT=${COMMIT:-origin/main} - -set -e - -# shellcheck disable=SC2153 # DSC_FILE is guaranteed to be defined by build-deb.py -DEB_FILE=${DSC_FILE%%.dsc}.debian.tar.xz -ORIG_FILE=$(echo ${DSC_FILE} | sed -e 's/-.*/.orig.tar.xz/') - -rm -rf mesa -git clone --depth 1 https://gitlab.freedesktop.org/mesa/mesa - -cd mesa -git fetch --depth 1 origin ${COMMIT##origin/} - -git checkout -f ${COMMIT} - -date=$(git log -1 --format=%cd --date=format:%Y%m%d ${COMMIT}) -subject=$(git log -1 --format="%h (\"%s\")" ${COMMIT}) -version=25.2.0~git${date} - -rm -rf ../mesa-${version} -mkdir ../mesa-${version} -git archive --format=tar HEAD | tar x -C ../mesa-${version} - -cd ../mesa-${version} - -rm -rf debian -tar xJf ${DEB_FILE} - -cat >> debian/changelog.tmp << EOF -mesa (${version}-0qcom1) testing; urgency=medium - - * Build git version from ${date}, commit ${subject} - - d/libegl-mesa0.symbols: include GL interop symbols into, exported by - libEGL_mesa.so.0 - - d/p/etnaviv-add-support-for-texelfetch.patch: drop, applied upstream - - debian/patches/path_max.diff: refresh - - d/rules: dropped removal of mme_{fermi,tu104}_sim_hw_test - - pull in NVK dependency, librust-rustc-hash-2-dev - - opt-in and enable several OpenCL drivers by default: asahi, freedreno and - radeonsi - * Drop support for features removed upstream: - - XA tracker, dropped packages: libxatracker2, libxatracker-dev. - - D3D9 tracker, dropped packages libd3dadapter9-mesa, - libd3dadapter9-mesa-dev. - - Clover, removed clover files from d/mesa-opencl-icd.install. - * Backport to trixie: - - Build with LLVM 19 since LLVM 20 is not available in trixie. - - d/control: regenerate - - -- Dmitry Baryshkov Wed, 11 Jun 2025 14:58:50 +0300 - -EOF -cat debian/changelog >> debian/changelog.tmp -mv debian/changelog.tmp debian/changelog - -# orig.tar.xz generation skips all .git* files, drop them from the source dir too. -rm -rf .git* - -debian/rules regen_control -debian/rules clean -debian/rules gentarball - -rm -rf ../mesa - -rm ${DSC_FILE} ${DEB_FILE} ${ORIG_FILE}* diff --git a/overlay-debs/mesa-snapshot/mesa-snapshot.yaml b/overlay-debs/mesa-snapshot/mesa-snapshot.yaml deleted file mode 100644 index f3a3262d..00000000 --- a/overlay-debs/mesa-snapshot/mesa-snapshot.yaml +++ /dev/null @@ -1,7 +0,0 @@ -dsc_url: "https://snapshot.debian.org/archive/debian/20250519T203618Z/pool/main/m/mesa/mesa_25.1.0-1.dsc" -dsc_sha256sum: "d06c1b0ee300f096de2ac59a2e9583349ca79322612f4502baa5e78ff0be4290" -debdiff_file: "mesa_25.2.0.debdiff" -script: mesa-snapshot.sh -suite: trixie -env: - COMMIT: 85abdb86d377c0e14a9bf73e8023c1845caf98e9 diff --git a/overlay-debs/mesa-snapshot/mesa_25.2.0.debdiff b/overlay-debs/mesa-snapshot/mesa_25.2.0.debdiff deleted file mode 100644 index 08ac7982..00000000 --- a/overlay-debs/mesa-snapshot/mesa_25.2.0.debdiff +++ /dev/null @@ -1,544 +0,0 @@ -diff -Nru mesa-25.2.0-orig/debian/control mesa-25.2.0/debian/control ---- mesa-25.2.0-orig/debian/control 2025-06-17 14:44:27.640693699 +0300 -+++ mesa-25.2.0/debian/control 2025-06-17 14:56:54.236499287 +0300 -@@ -48,11 +48,11 @@ - libelf-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], - libwayland-dev (>= 1.15.0) [linux-any], - libwayland-egl-backend-dev (>= 1.15.0) [linux-any], -- llvm-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -- libclang-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -- libclang-cpp20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -- libclc-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -- libclc-20 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -+ llvm-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -+ libclang-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -+ libclang-cpp19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -+ libclc-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -+ libclc-19 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], - wayland-protocols (>= 1.34), - zlib1g-dev, - libglvnd-core-dev (>= 1.3.2), -@@ -61,75 +61,18 @@ - rustfmt [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], - bindgen (>= 0.66.1~) [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], - cbindgen [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], -- llvm-spirv-20 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], -- libllvmspirvlib-20-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], -+ llvm-spirv-19 [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x x32], -+ libllvmspirvlib-19-dev [amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32], - librust-paste-dev [amd64 arm64 armhf i386 ppc64 riscv64 x32], -+ librust-rustc-hash-2-dev [amd64 arm64 armhf i386 ppc64 riscv64 x32], - librust-syn-dev (>= 2.0.48) [amd64 arm64 armhf i386 ppc64 riscv64 x32], -+Build-Conflicts: -+ librust-rustc-hash-dev (<< 2.0) [amd64 arm64 armhf i386 ppc64 riscv64 x32], - Rules-Requires-Root: no - Vcs-Git: https://salsa.debian.org/xorg-team/lib/mesa.git - Vcs-Browser: https://salsa.debian.org/xorg-team/lib/mesa - Homepage: https://mesa3d.org/ - --Package: libxatracker2 --Section: libs --Architecture: amd64 i386 x32 --Depends: -- ${shlibs:Depends}, -- ${misc:Depends}, --Pre-Depends: ${misc:Pre-Depends} --Multi-Arch: same --Description: X acceleration library -- runtime -- This package contains the XA (X acceleration) library. It is used exclusively -- by the X server to do render, copy and video acceleration. -- . -- XA is intended to be used by the vmware driver for virtualized X acceleration. -- --Package: libxatracker-dev --Section: libdevel --Architecture: amd64 i386 x32 --Depends: -- libxatracker2 (= ${binary:Version}), -- ${misc:Depends}, --Multi-Arch: same --Description: X acceleration library -- development files -- This package contains the XA (X acceleration) library. It is used exclusively -- by the X server to do render, copy and video acceleration. -- . -- XA is intended to be used by the vmware driver for virtualized X acceleration. -- . -- This package provides the development environment for compiling programs -- against the xatracker library. -- --Package: libd3dadapter9-mesa --Section: libs --Architecture: amd64 arm64 armel armhf i386 --Depends: -- ${shlibs:Depends}, -- ${misc:Depends}, -- libudev1 [linux-any], --Pre-Depends: ${misc:Pre-Depends} --Multi-Arch: same --Description: state-tracker for Direct3D9 -- This package contains a Gallium3D state tracker that implements the Direct3D9 -- API. Combined with the gallium-nine branch of Wine, programs using D3D9 can -- achieve native (or better) graphics performance. -- --Package: libd3dadapter9-mesa-dev --Section: libdevel --Architecture: amd64 arm64 armel armhf i386 --Depends: -- libd3dadapter9-mesa (= ${binary:Version}), -- libudev1 [linux-any], -- ${misc:Depends}, --Pre-Depends: ${misc:Pre-Depends} --Multi-Arch: same --Description: state-tracker for Direct3D9 -- development files -- This package contains a Gallium3D state tracker that implements the Direct3D9 -- API. Combined with the gallium-nine branch of Wine, programs using D3D9 can -- achieve native (or better) graphics performance. -- . -- Development files -- - Package: libgbm1 - Section: libs - Architecture: linux-any -@@ -374,7 +317,7 @@ - Architecture: amd64 arm64 armel armhf i386 loong64 mips64el powerpc ppc64 ppc64el riscv64 s390x sparc64 x32 - Pre-Depends: ${misc:Pre-Depends} - Depends: -- libclc-20, -+ libclc-19, - ocl-icd-libopencl1 | libopencl1, - ${shlibs:Depends}, - ${misc:Depends}, -diff -Nru mesa-25.2.0-orig/debian/control.in mesa-25.2.0/debian/control.in ---- mesa-25.2.0-orig/debian/control.in 2025-06-17 14:40:24.097165626 +0300 -+++ mesa-25.2.0/debian/control.in 2025-06-12 13:16:26.413310455 +0300 -@@ -64,72 +64,15 @@ - llvm-spirv-@LLVM_VERSION@ [@RUSTICL_ARCHS@], - libllvmspirvlib-@LLVM_VERSION@-dev [@LLVM_ARCHS@], - librust-paste-dev [@NVK_ARCHS@], -+ librust-rustc-hash-2-dev [@NVK_ARCHS@], - librust-syn-dev (>= 2.0.48) [@NVK_ARCHS@], -+Build-Conflicts: -+ librust-rustc-hash-dev (<< 2.0) [@NVK_ARCHS@], - Rules-Requires-Root: no - Vcs-Git: https://salsa.debian.org/xorg-team/lib/mesa.git - Vcs-Browser: https://salsa.debian.org/xorg-team/lib/mesa - Homepage: https://mesa3d.org/ - --Package: libxatracker2 --Section: libs --Architecture: amd64 i386 x32 --Depends: -- ${shlibs:Depends}, -- ${misc:Depends}, --Pre-Depends: ${misc:Pre-Depends} --Multi-Arch: same --Description: X acceleration library -- runtime -- This package contains the XA (X acceleration) library. It is used exclusively -- by the X server to do render, copy and video acceleration. -- . -- XA is intended to be used by the vmware driver for virtualized X acceleration. -- --Package: libxatracker-dev --Section: libdevel --Architecture: amd64 i386 x32 --Depends: -- libxatracker2 (= ${binary:Version}), -- ${misc:Depends}, --Multi-Arch: same --Description: X acceleration library -- development files -- This package contains the XA (X acceleration) library. It is used exclusively -- by the X server to do render, copy and video acceleration. -- . -- XA is intended to be used by the vmware driver for virtualized X acceleration. -- . -- This package provides the development environment for compiling programs -- against the xatracker library. -- --Package: libd3dadapter9-mesa --Section: libs --Architecture: @WINE_ARCHS@ --Depends: -- ${shlibs:Depends}, -- ${misc:Depends}, -- libudev1 [linux-any], --Pre-Depends: ${misc:Pre-Depends} --Multi-Arch: same --Description: state-tracker for Direct3D9 -- This package contains a Gallium3D state tracker that implements the Direct3D9 -- API. Combined with the gallium-nine branch of Wine, programs using D3D9 can -- achieve native (or better) graphics performance. -- --Package: libd3dadapter9-mesa-dev --Section: libdevel --Architecture: @WINE_ARCHS@ --Depends: -- libd3dadapter9-mesa (= ${binary:Version}), -- libudev1 [linux-any], -- ${misc:Depends}, --Pre-Depends: ${misc:Pre-Depends} --Multi-Arch: same --Description: state-tracker for Direct3D9 -- development files -- This package contains a Gallium3D state tracker that implements the Direct3D9 -- API. Combined with the gallium-nine branch of Wine, programs using D3D9 can -- achieve native (or better) graphics performance. -- . -- Development files -- - Package: libgbm1 - Section: libs - Architecture: linux-any -diff -Nru mesa-25.2.0-orig/debian/libd3dadapter9-mesa-dev.install mesa-25.2.0/debian/libd3dadapter9-mesa-dev.install ---- mesa-25.2.0-orig/debian/libd3dadapter9-mesa-dev.install 2025-06-17 14:40:24.097196561 +0300 -+++ mesa-25.2.0/debian/libd3dadapter9-mesa-dev.install 1970-01-01 02:00:00.000000000 +0200 -@@ -1,5 +0,0 @@ --usr/lib/*/pkgconfig/d3d.pc --usr/include/d3dadapter/d3dadapter9.h --usr/include/d3dadapter/drm.h --usr/include/d3dadapter/present.h -- -diff -Nru mesa-25.2.0-orig/debian/libd3dadapter9-mesa.install mesa-25.2.0/debian/libd3dadapter9-mesa.install ---- mesa-25.2.0-orig/debian/libd3dadapter9-mesa.install 2025-06-17 14:40:24.097203227 +0300 -+++ mesa-25.2.0/debian/libd3dadapter9-mesa.install 1970-01-01 02:00:00.000000000 +0200 -@@ -1 +0,0 @@ --usr/lib/*/d3d/d3dadapter9.so* -diff -Nru mesa-25.2.0-orig/debian/libegl-mesa0.symbols mesa-25.2.0/debian/libegl-mesa0.symbols ---- mesa-25.2.0-orig/debian/libegl-mesa0.symbols 2025-06-17 14:40:24.097217601 +0300 -+++ mesa-25.2.0/debian/libegl-mesa0.symbols 2025-06-12 13:16:26.413310455 +0300 -@@ -1,2 +1,5 @@ - libEGL_mesa.so.0 libegl-mesa0 #MINVER# - __egl_Main@Base 17.0.0~ -+ MesaGLInteropEGLExportObject@Base 25.2.0~ -+ MesaGLInteropEGLFlushObjects@Base 25.2.0~ -+ MesaGLInteropEGLQueryDeviceInfo@Base 25.2.0~ -diff -Nru mesa-25.2.0-orig/debian/libxatracker2.install mesa-25.2.0/debian/libxatracker2.install ---- mesa-25.2.0-orig/debian/libxatracker2.install 2025-06-17 14:40:24.097313948 +0300 -+++ mesa-25.2.0/debian/libxatracker2.install 1970-01-01 02:00:00.000000000 +0200 -@@ -1 +0,0 @@ --usr/lib/*/libxatracker.so.2* -diff -Nru mesa-25.2.0-orig/debian/libxatracker2.symbols mesa-25.2.0/debian/libxatracker2.symbols ---- mesa-25.2.0-orig/debian/libxatracker2.symbols 2025-06-17 14:40:24.097323635 +0300 -+++ mesa-25.2.0/debian/libxatracker2.symbols 1970-01-01 02:00:00.000000000 +0200 -@@ -1,35 +0,0 @@ --libxatracker.so.2 libxatracker2 #MINVER# -- xa_composite_allocation@Base 0 -- xa_composite_check_accelerated@Base 0 -- xa_composite_done@Base 0 -- xa_composite_prepare@Base 0 -- xa_composite_rect@Base 0 -- xa_context_create@Base 0 -- xa_context_default@Base 0 -- xa_context_destroy@Base 0 -- xa_context_flush@Base 0 -- xa_copy@Base 0 -- xa_copy_done@Base 0 -- xa_copy_prepare@Base 0 -- xa_fence_destroy@Base 0 -- xa_fence_get@Base 0 -- xa_fence_wait@Base 0 -- xa_format_check_supported@Base 0 -- xa_solid@Base 0 -- xa_solid_done@Base 0 -- xa_solid_prepare@Base 0 -- xa_surface_create@Base 0 -- xa_surface_dma@Base 0 -- xa_surface_format@Base 0 -- xa_surface_from_handle2@Base 11.1.0~ -- xa_surface_from_handle@Base 0 -- xa_surface_handle@Base 0 -- xa_surface_map@Base 0 -- xa_surface_redefine@Base 0 -- xa_surface_ref@Base 0 -- xa_surface_unmap@Base 0 -- xa_surface_unref@Base 0 -- xa_tracker_create@Base 0 -- xa_tracker_destroy@Base 0 -- xa_tracker_version@Base 0 -- xa_yuv_planar_blit@Base 0 -diff -Nru mesa-25.2.0-orig/debian/libxatracker-dev.install mesa-25.2.0/debian/libxatracker-dev.install ---- mesa-25.2.0-orig/debian/libxatracker-dev.install 2025-06-17 14:40:24.097307074 +0300 -+++ mesa-25.2.0/debian/libxatracker-dev.install 1970-01-01 02:00:00.000000000 +0200 -@@ -1,5 +0,0 @@ --usr/lib/*/libxatracker.so --usr/lib/*/pkgconfig/xatracker.pc --usr/include/xa_composite.h --usr/include/xa_context.h --usr/include/xa_tracker.h -diff -Nru mesa-25.2.0-orig/debian/mesa-opencl-icd.install mesa-25.2.0/debian/mesa-opencl-icd.install ---- mesa-25.2.0-orig/debian/mesa-opencl-icd.install 2025-06-17 14:40:24.097406806 +0300 -+++ mesa-25.2.0/debian/mesa-opencl-icd.install 2025-06-12 13:16:26.415262201 +0300 -@@ -1,3 +0,0 @@ --etc/OpenCL/vendors/mesa.icd --usr/lib/*/gallium-pipe/*.so --usr/lib/*/libMesaOpenCL* -diff -Nru mesa-25.2.0-orig/debian/rules mesa-25.2.0/debian/rules ---- mesa-25.2.0-orig/debian/rules 2025-06-17 14:40:24.097509038 +0300 -+++ mesa-25.2.0/debian/rules 2025-06-12 13:16:26.415262201 +0300 -@@ -13,7 +13,7 @@ - DEB_HOST_ARCH_CPU ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_CPU) - - # for finding the correct llvm-config when meson doesn't know about it yet --LLVM_VERSION = 20 -+LLVM_VERSION = 19 - export PATH:=/usr/lib/llvm-$(LLVM_VERSION)/bin/:$(PATH) - - export DEB_BUILD_MAINT_OPTIONS=optimize=-lto -@@ -46,6 +46,7 @@ - GALLIUM_DRIVERS = softpipe - VULKAN_DRIVERS = - VULKAN_LAYERS = -+RUSTICL_ENABLE = - - confflags_SSE2 = -Dsse2=true - confflags_TEFLON = -Dteflon=false -@@ -76,6 +77,7 @@ - # Freedreno requires arm in addition - ifneq (,$(filter arm arm64,$(DEB_HOST_ARCH_CPU))) - GALLIUM_DRIVERS += freedreno -+ RUSTICL_ENABLE += freedreno - endif - - # etnaviv, tegra, vc4 and v3d kernel support are only available on armhf and arm64 -@@ -92,8 +92,6 @@ - ifneq (,$(filter $(DEB_HOST_ARCH), amd64 i386 x32)) - GALLIUM_DRIVERS += crocus i915 iris svga - VULKAN_DRIVERS += intel intel_hasvk -- # svga needs xa state tracker -- confflags_GALLIUM += -Dgallium-xa=enabled - endif - - ifneq (,$(filter $(DEB_HOST_ARCH), amd64)) -@@ -111,12 +113,14 @@ - ifneq (,$(filter $(DEB_HOST_ARCH), arm64 amd64 i386)) - GALLIUM_DRIVERS += asahi - VULKAN_DRIVERS += asahi -+ RUSTICL_ENABLE += asahi - endif - - # LLVM is required for building r300g, radeonsi and llvmpipe drivers. - # It's also required for building OpenCL support. - ifneq (,$(filter $(DEB_HOST_ARCH), $(LLVM_ARCHS))) - GALLIUM_DRIVERS += radeonsi zink llvmpipe -+ RUSTICL_ENABLE += radeonsi - - # drop virtio from armel, it doesn't build - ifneq (,$(filter $(DEB_HOST_ARCH), armel)) -@@ -129,7 +127,6 @@ - - VULKAN_LAYERS += device-select intel-nullhw overlay - confflags_GALLIUM += -Dllvm=enabled -- confflags_GALLIUM += -Dgallium-opencl=icd - - # Build rusticl for archs where rustc is available - ifneq (,$(filter $(DEB_HOST_ARCH), $(RUSTICL_ARCHS))) -@@ -141,11 +138,6 @@ - VULKAN_DRIVERS += nouveau - endif - -- # nine makes sense only on archs that build wine -- ifneq (,$(filter $(DEB_HOST_ARCH), $(WINE_ARCHS))) -- confflags_GALLIUM += -Dgallium-nine=true -- endif -- - # gfxstream only builds on 64bit - ifeq ($(DEB_HOST_ARCH_BITS),64) - VULKAN_DRIVERS += gfxstream -@@ -172,6 +176,11 @@ - VULKAN_DRIVERS_LIST := $(subst $(space),$(comma),$(VULKAN_DRIVERS)) - VULKAN_LAYERS := $(patsubst %,'%',$(VULKAN_LAYERS)) - VULKAN_LAYERS_LIST := $(subst $(space),$(comma),$(VULKAN_LAYERS)) -+RUSTICL_ENABLE := $(patsubst %,'%',$(RUSTICL_ENABLE)) -+RUSTICL_ENABLE_LIST := $(subst $(space),$(comma),$(RUSTICL_ENABLE)) -+ifneq (,$(filter $(DEB_HOST_ARCH), $(RUSTICL_ARCHS))) -+confflags_GALLIUM += -Dgallium-rusticl-enable-drivers="[$(RUSTICL_ENABLE_LIST)]" -+endif - - confflags_GLES = -Dgles1=disabled -Dgles2=enabled - confflags_GALLIUM += -Dgallium-drivers="[$(GALLIUM_DRIVERS_LIST)]" -@@ -205,7 +197,7 @@ - - rewrite_wrap_files: - cp -r subprojects subprojects-save -- for crate in paste proc-macro2 quote syn unicode-ident; \ -+ for crate in paste rustc-hash proc-macro2 quote syn unicode-ident; \ - do \ - export crate_namever=`basename $$MESON_PACKAGE_CACHE_DIR/$$crate-*`; \ - sed -e"/source.*/d" -e"s,$${crate}-.*,$${crate_namever}," -i subprojects/$${crate}.wrap; \ -@@ -263,10 +255,6 @@ - # use -f to ensure we notice disappearing files: - rm debian/tmp/usr/lib/*/libEGL_mesa.so - rm debian/tmp/usr/lib/*/libGLX_mesa.so -- ifneq (,$(filter $(DEB_HOST_ARCH), $(NVK_ARCHS))) -- rm debian/tmp/usr/bin/mme_fermi_sim_hw_test -- rm debian/tmp/usr/bin/mme_tu104_sim_hw_test -- endif - # use -f here though - rm -f debian/tmp/usr/lib/*/libgrl.a - -diff -Nru mesa-25.2.0-orig/debian/patches/etnaviv-add-support-for-texelfetch.patch mesa-25.2.0/debian/patches/etnaviv-add-support-for-texelfetch.patch ---- mesa-25.2.0-orig/debian/patches/etnaviv-add-support-for-texelfetch.patch 2025-06-17 14:44:27.640952430 +0300 -+++ mesa-25.2.0/debian/patches/etnaviv-add-support-for-texelfetch.patch 1970-01-01 02:00:00.000000000 +0200 -@@ -1,144 +0,0 @@ --From da90fca6093dd58cc351b0ac624ea8c0d83a81f9 Mon Sep 17 00:00:00 2001 --From: Christian Gmeiner --Date: Fri, 18 Apr 2025 23:35:20 +0200 --Subject: [PATCH 1/3] etnaviv: isa: Add txf instruction -- --This instruction is used to implement texelfetch. -- --Blob generates such txf's for --dEQP-GLES3.functional.shaders.texture_functions.texelfetch.+ -- --Signed-off-by: Christian Gmeiner --Part-of: ----- -- src/etnaviv/isa/etnaviv.xml | 5 +++++ -- src/etnaviv/isa/tests/disasm.cpp | 1 + -- 2 files changed, 6 insertions(+) -- --diff --git a/src/etnaviv/isa/etnaviv.xml b/src/etnaviv/isa/etnaviv.xml --index a337c1e9d0762..42f551238bf1b 100644 ----- a/src/etnaviv/isa/etnaviv.xml --+++ b/src/etnaviv/isa/etnaviv.xml --@@ -1359,6 +1359,11 @@ SPDX-License-Identifier: MIT -- 1 -- -- --+ --+ 001001 --+ 1 --+ --+ -- -- 001100 -- 1 --diff --git a/src/etnaviv/isa/tests/disasm.cpp b/src/etnaviv/isa/tests/disasm.cpp --index aa027618aa40a..3d4ebec8a49be 100644 ----- a/src/etnaviv/isa/tests/disasm.cpp --+++ b/src/etnaviv/isa/tests/disasm.cpp --@@ -166,6 +166,7 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest, -- disasm_state{ {0x00801036, 0x15400804, 0x01540050, 0x00000002}, "clamp0_max t0.x___, u0.yyyy, u0.zzzz, void\n"}, -- disasm_state{ {0x0080103b, 0x00001804, 0x40000000, 0x00400028}, "iaddsat.s32 t0.x___, t1.xxxx, void, -t2.xxxx\n"}, -- disasm_state{ {0x01001008, 0x15400804, 0xd00100c0, 0x00000007}, "imod.u16 t0._y__, t0.yyyy, 1, void\n"}, --+ disasm_state{ {0x07811009, 0x15001f20, 0x01ff00c0, 0x78021008}, "txf t1, tex0.xyzw, t1.xyyy, t1.wwww, 4352\n", FLAG_FAILING_ASM}, -- disasm_state{ {0x0080103c, 0x00001804, 0x40000140, 0x00000000}, "imullo0.s32 t0.x___, t1.xxxx, t2.xxxx, void\n"}, -- disasm_state{ {0x00801000, 0x00001804, 0x40010140, 0x00000000}, "imulhi0.s32 t0.x___, t1.xxxx, t2.xxxx, void\n"}, -- disasm_state{ {0x00801004, 0x00201804, 0x40010040, 0x00000000}, "idiv0.s16 t0.x___, t1.xxxx, t0.xxxx, void\n"}, ---- --GitLab -- -- --From eefe486533eb58d3d1e81daa5abd16e63ee4c7a9 Mon Sep 17 00:00:00 2001 --From: Christian Gmeiner --Date: Fri, 18 Apr 2025 23:37:19 +0200 --Subject: [PATCH 2/3] etnaviv: nir: Legalize txf lod src -- --The LOD must be a float, unlike the GLSL function, which expects an integer. -- --Signed-off-by: Christian Gmeiner --Reviewed-by: Faith Ekstrand --Part-of: ----- -- .../etnaviv/etnaviv_nir_lower_texture.c | 25 +++++++++++++++++++ -- 1 file changed, 25 insertions(+) -- --diff --git a/src/gallium/drivers/etnaviv/etnaviv_nir_lower_texture.c b/src/gallium/drivers/etnaviv/etnaviv_nir_lower_texture.c --index d0462ead016dc..d20d175da79a8 100644 ----- a/src/gallium/drivers/etnaviv/etnaviv_nir_lower_texture.c --+++ b/src/gallium/drivers/etnaviv/etnaviv_nir_lower_texture.c --@@ -26,6 +26,28 @@ lower_txs(nir_builder *b, nir_instr *instr, UNUSED void *data) -- return true; -- } -- --+static bool --+legalize_txf_lod(nir_builder *b, nir_instr *instr, UNUSED void *data) --+{ --+ if (instr->type != nir_instr_type_tex) --+ return false; --+ --+ nir_tex_instr *tex = nir_instr_as_tex(instr); --+ --+ if (tex->op != nir_texop_txf) --+ return false; --+ --+ b->cursor = nir_before_instr(instr); --+ --+ int lod_index = nir_tex_instr_src_index(tex, nir_tex_src_lod); --+ assert(lod_index >= 0); --+ nir_def *lod = tex->src[lod_index].src.ssa; --+ --+ nir_src_rewrite(&tex->src[lod_index].src, nir_i2f32(b, lod)); --+ --+ return true; --+} --+ -- bool -- etna_nir_lower_texture(nir_shader *s, struct etna_shader_key *key) -- { --@@ -48,5 +70,8 @@ etna_nir_lower_texture(nir_shader *s, struct etna_shader_key *key) -- NIR_PASS(progress, s, nir_shader_instructions_pass, lower_txs, -- nir_metadata_control_flow, NULL); -- --+ NIR_PASS(progress, s, nir_shader_instructions_pass, legalize_txf_lod, --+ nir_metadata_control_flow, NULL); --+ -- return progress; -- } ---- --GitLab -- -- --From 614b66529de2832575cdb0c97581d0d5f791ed72 Mon Sep 17 00:00:00 2001 --From: Christian Gmeiner --Date: Fri, 18 Apr 2025 23:42:14 +0200 --Subject: [PATCH 3/3] etnaviv: nir: Add support for txf texture operation -- --The src[2] value 0x1100 is set based on observed behavior of the blob driver, --though its exact meaning remains to be documented. -- --Passes all dEQP-GLES3.functional.shaders.texture_functions.texelfetch.* --tests on GC7000. -- --Signed-off-by: Christian Gmeiner --Part-of: ----- -- src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.c | 4 ++++ -- 1 file changed, 4 insertions(+) -- --diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.c b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.c --index 08a5ab5fb7bc3..708f0788b580d 100644 ----- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.c --+++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir_emit.c --@@ -212,6 +212,10 @@ etna_emit_tex(struct etna_compile *c, nir_texop op, unsigned texid, unsigned dst -- case nir_texop_txb: inst.opcode = ISA_OPC_TEXLDB; break; -- case nir_texop_txd: inst.opcode = ISA_OPC_TEXLDD; break; -- case nir_texop_txl: inst.opcode = ISA_OPC_TEXLDL; break; --+ case nir_texop_txf: --+ inst.opcode = ISA_OPC_TXF; --+ inst.src[2] = etna_immediate_int(0x1100); --+ break; -- default: -- compile_error(c, "Unhandled NIR tex type: %d\n", op); -- } ---- --GitLab -- -diff -Nru mesa-25.2.0-orig/debian/patches/path_max.diff mesa-25.2.0/debian/patches/path_max.diff ---- mesa-25.2.0-orig/debian/patches/path_max.diff 2025-06-17 14:44:27.640961231 +0300 -+++ mesa-25.2.0/debian/patches/path_max.diff 2025-06-17 14:44:55.205596046 +0300 -@@ -34,6 +34,6 @@ - +#define PATH_MAX (4096) - +#endif - + -- #define MODULE_PREFIX "pipe_" -- - static int (*backends[])(struct pipe_loader_device **, int) = { -+ #ifdef HAVE_LIBDRM -+ &pipe_loader_drm_probe, -diff -Nru mesa-25.2.0-orig/debian/patches/series mesa-25.2.0/debian/patches/series ---- mesa-25.2.0-orig/debian/patches/series 2025-06-17 14:44:27.640967846 +0300 -+++ mesa-25.2.0/debian/patches/series 2025-06-17 14:45:04.690440415 +0300 -@@ -2,4 +2,3 @@ - src_glx_dri_common.h.diff - disable_ppc64el_assembly.diff - drisw-Avoid-crashing-when-swrast_loader-NULL.patch --etnaviv-add-support-for-texelfetch.patch