Skip to content

Commit d2f8b60

Browse files
bors[bot]jordens
andauthored
Merge #65
65: Tim2 late enable r=jordens a=jordens does this work for you @cjbe? bors r+ Co-authored-by: Robert Jördens <[email protected]>
2 parents 3cf4f26 + 1140b4f commit d2f8b60

File tree

3 files changed

+15
-23
lines changed

3 files changed

+15
-23
lines changed

src/board.rs

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -399,8 +399,7 @@ fn tim2_setup(tim2: &pac::TIM2) {
399399
tim2.dier.write(|w| w.ude().set_bit());
400400
tim2.egr.write(|w| w.ug().set_bit());
401401
tim2.cr1.modify(|_, w|
402-
w.dir().clear_bit() // up
403-
.cen().set_bit()); // enable
402+
w.dir().clear_bit()); // up
404403
}
405404

406405
fn dma1_setup(dma1: &pac::DMA1, dmamux1: &pac::DMAMUX1, ma: usize, pa0: usize, pa1: usize) {
@@ -524,9 +523,19 @@ pub fn init() {
524523

525524
tim2_setup(&dp.TIM2);
526525

527-
let i2c2 = dp.I2C2;
528-
i2c::setup(&rcc, &i2c2);
526+
rcc.apb1lenr.modify(|_,w| w.i2c2en().set_bit());
527+
i2c::setup(&dp.I2C2);
529528

530-
eth::setup(&rcc, &dp.SYSCFG);
529+
rcc.apb4enr.modify(|_, w| w.syscfgen().set_bit());
530+
rcc.ahb1enr.modify(|_, w| {
531+
w.eth1macen().set_bit()
532+
.eth1txen().set_bit()
533+
.eth1rxen().set_bit()
534+
});
535+
dp.SYSCFG.pmcr.modify(|_, w| unsafe { w.epis().bits(0b100) }); // RMII
531536
eth::setup_pins(&dp.GPIOA, &dp.GPIOB, &dp.GPIOC, &dp.GPIOG);
537+
538+
// enable TIM2 this must be late to be able to handle the first ADC SPI
539+
// interrupt in time
540+
dp.TIM2.cr1.modify(|_, w| w.cen().set_bit());
532541
}

src/eth.rs

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -85,19 +85,6 @@ use self::cr_consts::*;
8585
// 200 MHz AHB clock = eth_hclk
8686
const CLOCK_RANGE: u8 = ETH_MACMIIAR_CR_HCLK_DIV_102;
8787

88-
89-
pub fn setup(rcc: &pac::RCC, syscfg: &pac::SYSCFG) {
90-
rcc.apb4enr.modify(|_, w| w.syscfgen().set_bit());
91-
rcc.ahb1enr.modify(|_, w| {
92-
w.eth1macen().set_bit()
93-
.eth1txen().set_bit()
94-
.eth1rxen().set_bit()
95-
});
96-
syscfg.pmcr.modify(|_, w| unsafe { w.epis().bits(0b100) }); // RMII
97-
//rcc.ahb1rstr.modify(|_, w| w.eth1macrst().set_bit());
98-
//rcc.ahb1rstr.modify(|_, w| w.eth1macrst().clear_bit());
99-
}
100-
10188
pub fn setup_pins(gpioa: &pac::GPIOA, gpiob: &pac::GPIOB,
10289
gpioc: &pac::GPIOC, gpiog: &pac::GPIOG) {
10390
// PA1 RMII_REF_CLK

src/i2c.rs

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -21,11 +21,7 @@ pub enum Error {
2121
const N_RETRY: usize = 100; // ~ 10ms @ 100 kHz bus clock
2222

2323

24-
pub fn setup(rcc: &pac::RCC, i2c: &pac::I2C2) {
25-
rcc.apb1lenr.modify(|_,w|
26-
w.i2c2en().set_bit()
27-
);
28-
24+
pub fn setup(i2c: &pac::I2C2) {
2925
// Disable the peripheral before setting timings
3026
i2c.cr1.modify(|_, w| w.pe().clear_bit());
3127

0 commit comments

Comments
 (0)