Skip to content

Commit ae4c0f8

Browse files
authored
Update timm library to 0.4.12 (#429)
1 parent a6e1123 commit ae4c0f8

File tree

3 files changed

+8
-8
lines changed

3 files changed

+8
-8
lines changed

requirements.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
torchvision>=0.3.0
1+
torchvision>=0.5.0
22
pretrainedmodels==0.7.4
33
efficientnet-pytorch==0.6.3
4-
timm==0.3.2
4+
timm==0.4.12

segmentation_models_pytorch/encoders/timm_efficientnet.py

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
1+
from functools import partial
2+
13
import torch
24
import torch.nn as nn
35

@@ -41,9 +43,8 @@ def get_efficientnet_kwargs(channel_multiplier=1.0, depth_multiplier=1.0, drop_r
4143
block_args=decode_arch_def(arch_def, depth_multiplier),
4244
num_features=round_channels(1280, channel_multiplier, 8, None),
4345
stem_size=32,
44-
channel_multiplier=channel_multiplier,
46+
round_chs_fn=partial(round_channels, multiplier=channel_multiplier),
4547
act_layer=Swish,
46-
norm_kwargs={}, # TODO: check
4748
drop_rate=drop_rate,
4849
drop_path_rate=0.2,
4950
)
@@ -81,9 +82,8 @@ def gen_efficientnet_lite_kwargs(channel_multiplier=1.0, depth_multiplier=1.0, d
8182
num_features=1280,
8283
stem_size=32,
8384
fix_stem=True,
84-
channel_multiplier=channel_multiplier,
85+
round_chs_fn=partial(round_channels, multiplier=channel_multiplier),
8586
act_layer=nn.ReLU6,
86-
norm_kwargs={},
8787
drop_rate=drop_rate,
8888
drop_path_rate=0.2,
8989
)

segmentation_models_pytorch/encoders/timm_sknet.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ def load_state_dict(self, state_dict, **kwargs):
7474
'block': SelectiveKernelBasic,
7575
'layers': [2, 2, 2, 2],
7676
'zero_init_last_bn': False,
77-
'block_args': {'sk_kwargs': {'min_attn_channels': 16, 'attn_reduction': 8, 'split_input': True}}
77+
'block_args': {'sk_kwargs': {'rd_ratio': 1/8, 'split_input': True}}
7878
}
7979
},
8080
'timm-skresnet34': {
@@ -85,7 +85,7 @@ def load_state_dict(self, state_dict, **kwargs):
8585
'block': SelectiveKernelBasic,
8686
'layers': [3, 4, 6, 3],
8787
'zero_init_last_bn': False,
88-
'block_args': {'sk_kwargs': {'min_attn_channels': 16, 'attn_reduction': 8, 'split_input': True}}
88+
'block_args': {'sk_kwargs': {'rd_ratio': 1/8, 'split_input': True}}
8989
}
9090
},
9191
'timm-skresnext50_32x4d': {

0 commit comments

Comments
 (0)