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Commit fe4e6ae

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author
Valentin Obst
committed
squash: address FB
1 parent 631c249 commit fe4e6ae

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2 files changed

+97
-181
lines changed

2 files changed

+97
-181
lines changed

‎libr/arch/p/mips/plugin_cs.c‎

Lines changed: 89 additions & 169 deletions
Original file line numberDiff line numberDiff line change
@@ -63,27 +63,22 @@ R_IPI int mips_assemble(const char *str, ut64 pc, ut8 *out);
6363
#define ES_IS_NEGATIVE(arg) "1,"arg",<<<,1,&"
6464

6565

66-
// call with delay slot
66+
// Call with delay slot.
6767
#define ES_CALL_DR(ra, addr) "pc,4,+,"ra",=,"ES_J_D(addr)
6868
#define ES_CALL_D(addr) ES_CALL_DR("ra", addr)
6969

70-
// call without delay slot
70+
// Call without delay slot.
7171
#define ES_CALL_NDR(ra, addr) "pc,"ra",=,"ES_J_ND(addr)
7272
#define ES_CALL_ND(addr) ES_CALL_NDR("ra", addr)
7373

74-
#define USE_DS 1
75-
#if USE_DS
76-
// emit ERR trap if executed in a delay slot
77-
#define ES_TRAP_DS() "$ds,!,!,?{,$$,1,TRAP,BREAK,},"
78-
// Record jump-to-address and set delay slot flag.
74+
// Trap if executed in a delay slot.
75+
#define ES_TRAP_DS(addr) "$ds,!,!,?{," addr ",1,TRAP,BREAK,},"
76+
// Record address in $jt and set $ds.
7977
#define ES_J_D(addr) addr",SETJT,1,SETD"
8078
// Jump to address.
8179
#define ES_J_ND(addr) addr",pc,:="
82-
#else
83-
#define ES_TRAP_DS() ""
84-
#define ES_J_D(addr) addr",pc,:="
85-
#define ES_J_ND(addr) ES_J_D(addr)
86-
#endif
80+
// Skips the next instruction.
81+
#define ES_SKIP_NXT() "pc,4,+,pc,:="
8782

8883
#define ES_B(x) "0xff,"x",&"
8984
#define ES_H(x) "0xffff,"x",&"
@@ -244,7 +239,7 @@ static const char *arg(csh *handle, cs_insn *insn, char *buf, size_t buf_sz, int
244239
static int analop_esil(RArchSession *as, RAnalOp *op, csh *handle, cs_insn *insn) {
245240
char str[8][32] = {{0}};
246241
int i;
247-
u_int64_t addr = insn->address;
242+
ut64 addr = insn->address;
248243

249244
r_strbuf_init (&op->esil);
250245
r_strbuf_set (&op->esil, "");
@@ -320,262 +315,187 @@ static int analop_esil(RArchSession *as, RAnalOp *op, csh *handle, cs_insn *insn
320315
break;
321316
case MIPS_INS_BALC:
322317
// BALC address
323-
// Branch And Link, Compact. Unconditional PC relative branch to address, placing return address
324-
// in register $31.
325-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_CALL_ND ("%s"), ARG (0));
326-
#if USE_DS
327-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
328-
#endif
318+
// Branch And Link, Compact. Unconditional PC relative branch to address,
319+
// placing return address in register $31.
320+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_CALL_ND ("%s"), addr, ARG (0));
329321
break;
330322
case MIPS_INS_BAL:
331323
case MIPS_INS_JAL:
332-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_CALL_D ("%s"), ARG (0));
333-
#if USE_DS
334-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
335-
#endif
324+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_CALL_D ("%s"), addr, ARG (0));
336325
break;
337326
case MIPS_INS_JALR:
338327
case MIPS_INS_JALRS:
339328
if (OPCOUNT () < 2) {
340-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_CALL_D ("%s"), ARG (0));
329+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_CALL_D ("%s"), addr, ARG (0));
341330
} else {
342331
PROTECT_ZERO () {
343-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_CALL_DR ("%s", "%s"), ARG (0), ARG (1));
332+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_CALL_DR ("%s", "%s"), addr, ARG (0), ARG (1));
344333
}
345334
}
346-
#if USE_DS
347-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
348-
#endif
349335
break;
350336
case MIPS_INS_JALRC: // no delay
351337
if (OPCOUNT () < 2) {
352-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_CALL_ND ("%s"), ARG (0));
338+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_CALL_ND ("%s"), addr, ARG (0));
353339
} else {
354340
PROTECT_ZERO () {
355-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_CALL_NDR ("%s", "%s"), ARG (0), ARG (1));
341+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_CALL_NDR ("%s", "%s"), addr, ARG (0), ARG (1));
356342
}
357343
}
358-
#if USE_DS
359-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
360-
#endif
361344
break;
362345
case MIPS_INS_JRADDIUSP:
363346
// increment stackpointer in X and jump to %ra
364-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,sp,+=," ES_J_D ("ra"), ARG (0));
365-
#if USE_DS
366-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
367-
#endif
347+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,sp,+=," ES_J_D ("ra"), addr, ARG (0));
368348
break;
369349
case MIPS_INS_JRC:
370350
case MIPS_INS_BC:
371351
// JRC rt
372352
// Jump Register, Compact. Unconditional jump to address in register $rt.
373353
// BC address
374354
// Branch, Compact. Unconditional PC relative branch to address.
375-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_J_ND ("%s"), ARG (0));
376-
#if USE_DS
377-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
378-
#endif
355+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_J_ND ("%s"), addr, ARG (0));
379356
break;
380357
case MIPS_INS_JR:
381358
case MIPS_INS_J:
382359
case MIPS_INS_B: // ???
383360
// jump to address with conditional
384-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "" ES_J_D ("%s"), ARG (0));
385-
#if USE_DS
386-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
387-
#endif
361+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "" ES_J_D ("%s"), addr, ARG (0));
388362
break;
389363
case MIPS_INS_BNEC:
390364
// BNEC rs, rt, address
391365
// Branch Not Equal, Compact. PC relative branch to address if register $rs is not equal to
392366
// register $rt.
393-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,%s,==,$z,!,?{," ES_J_ND ("%s") ",}",
394-
ARG (0), ARG (1), ARG (2));
395-
#if USE_DS
396-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
397-
#endif
367+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,==,$z,!,?{," ES_J_ND ("%s") ",}",
368+
addr, ARG (0), ARG (1), ARG (2));
398369
break;
399370
case MIPS_INS_BNE: // bne $s, $t, offset
371+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,==,$z,!,?{," ES_J_D ("%s") ",}",
372+
addr, ARG (0), ARG (1), ARG (2));
373+
break;
400374
case MIPS_INS_BNEL:
401-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,%s,==,$z,!,?{," ES_J_D ("%s") ",}",
402-
ARG (0), ARG (1), ARG (2));
403-
#if USE_DS
404-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
405-
#endif
375+
// BNEL rs, rt, offset
376+
// To compare GPRs then do a PC-relative conditional branch; execute the delay slot only if
377+
// the branch is taken.
378+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,==,$z,!,?{," ES_J_D ("%s") ",}{," ES_SKIP_NXT () ",}",
379+
addr, ARG (0), ARG (1), ARG (2));
406380
break;
407381
case MIPS_INS_BEQC:
408382
// BEQC rs, rt, address
409383
// Branch if Equal, Compact. PC relative branch to address if registers $rs and $rt are are equal.
410-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,%s,==,$z,?{," ES_J_ND ("%s") ",}",
411-
ARG (0), ARG (1), ARG (2));
412-
#if USE_DS
413-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
414-
#endif
384+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,==,$z,?{," ES_J_ND ("%s") ",}",
385+
addr, ARG (0), ARG (1), ARG (2));
415386
break;
416387
case MIPS_INS_BEQ:
388+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,==,$z,?{," ES_J_D ("%s") ",}",
389+
addr, ARG (0), ARG (1), ARG (2));
390+
break;
417391
case MIPS_INS_BEQL:
418-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,%s,==,$z,?{," ES_J_D ("%s") ",}",
419-
ARG (0), ARG (1), ARG (2));
420-
#if USE_DS
421-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
422-
#endif
392+
// BEQL rs, rt, offset
393+
// To compare GPRs then do a PC-relative conditional branch; execute the delay slot only if
394+
// the branch is taken.
395+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,==,$z,?{," ES_J_D ("%s") ",}{," ES_SKIP_NXT () ",}",
396+
addr, ARG (0), ARG (1), ARG (2));
423397
break;
424398
case MIPS_INS_BEQZC:
425399
// BEQZC rt, address # when rt and address are in range
426400
// Branch if Equal to Zero, Compact. PC relative branch to address if register $rt equals zero.
427-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,0,==,$z,?{," ES_J_ND ("%s") ",}",
428-
ARG (0), ARG (1));
429-
#if USE_DS
430-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
431-
#endif
401+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,0,==,$z,?{," ES_J_ND ("%s") ",}",
402+
addr, ARG (0), ARG (1));
432403
break;
433404
case MIPS_INS_BZ:
434405
case MIPS_INS_BEQZ:
435-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,0,==,$z,?{," ES_J_D ("%s") ",}",
436-
ARG (0), ARG (1));
437-
#if USE_DS
438-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
439-
#endif
406+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,0,==,$z,?{," ES_J_D ("%s") ",}",
407+
addr, ARG (0), ARG (1));
440408
break;
441409
case MIPS_INS_BNEZC:
442410
// BNEZC rt, address
443411
// Branch if Not Equal to Zero, Compact. PC relative branch to address if register $rt is not equal to zero.
444-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,0,==,$z,!,?{," ES_J_ND ("%s") ",}",
445-
ARG (0), ARG (1));
446-
#if USE_DS
447-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
448-
#endif
412+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,0,==,$z,!,?{," ES_J_ND ("%s") ",}",
413+
addr, ARG (0), ARG (1));
449414
break;
450415
case MIPS_INS_BNEZ:
451-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,0,==,$z,!,?{," ES_J_D ("%s") ",}",
452-
ARG (0), ARG (1));
453-
#if USE_DS
454-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
455-
#endif
416+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,0,==,$z,!,?{," ES_J_D ("%s") ",}",
417+
addr, ARG (0), ARG (1));
456418
break;
457419
case MIPS_INS_BEQZALC:
458-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,0,==,$z,?{," ES_CALL_ND ("%s") ",}",
459-
ARG (0), ARG (1));
460-
#if USE_DS
461-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
462-
#endif
420+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,0,==,$z,?{," ES_CALL_ND ("%s") ",}",
421+
addr, ARG (0), ARG (1));
463422
break;
464423
case MIPS_INS_BLEZC:
465-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,%s,==,$z,?{," ES_J_ND ("%s") ",BREAK,},",
466-
ARG (0), ARG (1));
467-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_ND ("%s") ",}",
468-
ARG (0), ARG (1));
469-
#if USE_DS
470-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
471-
#endif
424+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,<=,?{," ES_J_ND ("%s") ",},",
425+
addr, ARG (0), ARG (1));
472426
break;
473427
case MIPS_INS_BLEZ:
428+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,<=,?{," ES_J_D ("%s") ",},",
429+
addr, ARG (0), ARG (1));
430+
break;
474431
case MIPS_INS_BLEZL:
475-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,%s,==,$z,?{," ES_J_D ("%s") ",BREAK,},",
476-
ARG (0), ARG (1));
477-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}",
478-
ARG (0), ARG (1));
479-
#if USE_DS
480-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
481-
#endif
432+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,<=,?{," ES_J_D ("%s") ",}{," ES_SKIP_NXT () ",}",
433+
addr, ARG (0), ARG (1));
482434
break;
483435
case MIPS_INS_BGEC:
484436
// BGEC rs, rt, address
485437
// Branch if Greater than or Equal, Compact. PC relative branch to address if register $rs
486438
// is greater than or equal to register $rt.
487-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "%s,%s,>=,$z,?{," ES_J_ND ("%s") ",}",
488-
ARG (1), ARG (0), ARG (2));
489-
#if USE_DS
490-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
491-
#endif
439+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "%s,%s,>=,?{," ES_J_ND ("%s") ",}",
440+
addr, ARG (1), ARG (0), ARG (2));
492441
break;
493442
case MIPS_INS_BGEZC:
494-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_ND ("%s") ",}",
495-
ARG (0), ARG (1));
496-
#if USE_DS
497-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
498-
#endif
443+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_ND ("%s") ",}",
444+
addr, ARG (0), ARG (1));
499445
break;
500446
case MIPS_INS_BGEZ:
447+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}",
448+
addr, ARG (0), ARG (1));
449+
break;
501450
case MIPS_INS_BGEZL:
502-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}",
503-
ARG (0), ARG (1));
504-
#if USE_DS
505-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
506-
#endif
451+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}{," ES_SKIP_NXT () ",}",
452+
addr, ARG (0), ARG (1));
507453
break;
508454
case MIPS_INS_BGEZAL:
509-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_D ("%s") ",}",
510-
ARG (0), ARG (1));
511-
#if USE_DS
512-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
513-
#endif
455+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_D ("%s") ",}",
456+
addr, ARG (0), ARG (1));
514457
break;
515458
case MIPS_INS_BGEZALC:
516-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_ND ("%s") ",}",
517-
ARG (0), ARG (1));
518-
#if USE_DS
519-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
520-
#endif
459+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_ND ("%s") ",}",
460+
addr, ARG (0), ARG (1));
521461
break;
522462
case MIPS_INS_BGTZALC:
523-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,%s,==,$z,?{,BREAK,},", ARG (0));
524-
r_strbuf_appendf (&op->esil, "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_ND ("%s") ",}",
525-
ARG (0), ARG (1));
526-
#if USE_DS
527-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
528-
#endif
463+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,>,?{," ES_CALL_ND ("%s") ",}",
464+
addr, ARG (0), ARG (1));
529465
break;
530466
case MIPS_INS_BLTZAL:
531-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_D ("%s") ",}", ARG (0), ARG (1));
532-
#if USE_DS
533-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
534-
#endif
467+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_CALL_D ("%s") ",}",
468+
addr, ARG (0), ARG (1));
535469
break;
536470
case MIPS_INS_BLTZC:
537-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_ND ("%s") ",}",
538-
ARG (0), ARG (1));
539-
#if USE_DS
540-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
541-
#endif
471+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_ND ("%s") ",}",
472+
addr, ARG (0), ARG (1));
542473
break;
543474
case MIPS_INS_BLTZ:
475+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}",
476+
addr, ARG (0), ARG (1));
477+
break;
544478
case MIPS_INS_BLTZL:
545-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}",
546-
ARG (0), ARG (1));
547-
#if USE_DS
548-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
549-
#endif
479+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "1," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}{," ES_SKIP_NXT () ",}",
480+
addr, ARG (0), ARG (1));
550481
break;
551482
case MIPS_INS_BGTZC:
552-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,%s,==,$z,?{,BREAK,},", ARG (0));
553-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_ND ("%s") ",}",
554-
ARG (0), ARG (1));
555-
#if USE_DS
556-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
557-
#endif
483+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,>,?{," ES_J_ND ("%s") ",},",
484+
addr, ARG (0), ARG (1));
558485
break;
559486
case MIPS_INS_BGTZ:
487+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,>,?{," ES_J_D ("%s") ",},",
488+
addr, ARG (0), ARG (1));
489+
break;
560490
case MIPS_INS_BGTZL:
561-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,%s,==,$z,?{,BREAK,},", ARG (0));
562-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0," ES_IS_NEGATIVE ("%s") ",==,$z,?{," ES_J_D ("%s") ",}",
563-
ARG (0), ARG (1));
564-
#if USE_DS
565-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
566-
#endif
491+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,%s,>,?{," ES_J_D ("%s") ",}{," ES_SKIP_NXT () ",}",
492+
addr, ARG (0), ARG (1));
567493
break;
568494
case MIPS_INS_BTEQZ:
569-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,t,==,$z,?{," ES_J_D ("%s") ",}", ARG (0));
570-
#if USE_DS
571-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
572-
#endif
495+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,t,==,$z,?{," ES_J_D ("%s") ",}", addr, ARG (0));
573496
break;
574497
case MIPS_INS_BTNEZ:
575-
r_strbuf_appendf (&op->esil, ES_TRAP_DS () "0,t,==,$z,!,?{," ES_J_D ("%s") ",}", ARG (0));
576-
#if USE_DS
577-
r_strbuf_replacef (&op->esil, "$$", "0x%"PFMT64x, addr);
578-
#endif
498+
r_strbuf_appendf (&op->esil, ES_TRAP_DS ("0x%"PFMT64x) "0,t,==,$z,!,?{," ES_J_D ("%s") ",}", addr, ARG (0));
579499
break;
580500
case MIPS_INS_MOV:
581501
case MIPS_INS_MOVE:

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