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[Backend] Bump to llvm/llvm-project@ebf5d9e
This bump picks up llvm/llvm-project#169546 which resolves some register spilling in downstream use cases. Additionally, we also pick up llvm/llvm-project#166648 which converted udiv and sdiv to non Pure attributes. This require changes on warp_specialize_to_llvm.mlir `remat_subgraph` since the original test found in triton-lang@8601b39 was meant to test rematerializing some "pure ops" into partition region, which the tested udiv is no longer. This PR Replaced it with urem which is similar class of op who still has Pure trait. Signed-off-by: Stanley Winata <[email protected]>
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cmake/llvm-hash.txt

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test/Conversion/warp_specialize_to_llvm.mlir

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@@ -653,7 +653,7 @@ llvm.func @remat_subgraph(%arg0: i32, %arg1: i32) attributes {allocation.offset
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%1 = llvm.getelementptr %0[%arg0] : (!llvm.ptr<3>, i32) -> !llvm.ptr<3>, i32
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%2 = llvm.add %arg0, %arg1 : i32
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%3 = llvm.mul %2, %arg1 : i32
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%4 = llvm.udiv %2, %3 : i32
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%4 = llvm.urem %2, %3 : i32
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ttg.warp_specialize(%1, %4) attributes {allocation.offset = 0 : i32, warpGroupStartIds = array<i32: 4>}
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default {
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ttg.warp_yield
@@ -663,9 +663,9 @@ llvm.func @remat_subgraph(%arg0: i32, %arg1: i32) attributes {allocation.offset
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// CHECK-NEXT: "llvm.nvvm.barrier.cta.sync.all"([[C1]])
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// CHECK-NEXT: [[ADD:%.*]] = llvm.add %arg0, %arg1 : i32
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// CHECK-NEXT: [[MUL:%.*]] = llvm.mul [[ADD]], %arg1 : i32
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// CHECK-NEXT: [[UDIV:%.*]] = llvm.udiv [[ADD]], [[MUL]] : i32
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// CHECK-NEXT: [[UREM:%.*]] = llvm.urem [[ADD]], [[MUL]] : i32
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// CHECK-NEXT: [[PTR:%.*]] = llvm.getelementptr [[ADDR]][%arg0]
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// CHECK-NEXT: "use"([[PTR]], [[UDIV]])
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// CHECK-NEXT: "use"([[PTR]], [[UREM]])
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"use"(%arg2, %arg3) : (!llvm.ptr<3>, i32) -> ()
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// CHECK-NEXT: "llvm.nvvm.barrier.cta.sync.all"([[C1]])
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ttg.warp_return

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