@@ -21,61 +21,70 @@ using namespace std::literals::chrono_literals;
2121
2222LOG_DEFINE_CATEGORY (RPiController)
2323
24- static const std::map<std::string, Controller::HardwareConfig> HardwareConfigMap = {
25- {
26- " bcm2835" ,
24+ namespace {
25+
26+ const std::map<std::string, Controller::HardwareConfig> &hardwareConfigMap ()
27+ {
28+ static const std::map<std::string, Controller::HardwareConfig> map = {
2729 {
28- /*
29- * There are only ever 15 AGC regions computed by the firmware
30- * due to zoning, but the HW defines AGC_REGIONS == 16!
31- */
32- . agcRegions = { 15 , 1 },
33- . agcZoneWeights = { 15 , 1 },
34- . awbRegions = { 16 , 12 },
35- . cacRegions = { 0 , 0 },
36- . focusRegions = { 4 , 3 },
37- . numHistogramBins = 128 ,
38- . numGammaPoints = 33 ,
39- . pipelineWidth = 13 ,
40- . statsInline = false ,
41- . minPixelProcessingTime = 0s ,
42- . dataBufferStrided = true ,
43- }
44- } ,
45- {
46- " pisp " ,
30+ " bcm2835 " ,
31+ {
32+ /*
33+ * There are only ever 15 AGC regions computed by the firmware
34+ * due to zoning, but the HW defines AGC_REGIONS == 16!
35+ */
36+ . agcRegions = { 15 , 1 },
37+ . agcZoneWeights = { 15 , 1 },
38+ . awbRegions = { 16 , 12 },
39+ . cacRegions = { 0 , 0 } ,
40+ . focusRegions = { 4 , 3 } ,
41+ . numHistogramBins = 128 ,
42+ . numGammaPoints = 33 ,
43+ . pipelineWidth = 13 ,
44+ . statsInline = false ,
45+ . minPixelProcessingTime = 0s,
46+ . dataBufferStrided = true ,
47+ }
48+ } ,
4749 {
48- .agcRegions = { 0 , 0 },
49- .agcZoneWeights = { 15 , 15 },
50- .awbRegions = { 32 , 32 },
51- .cacRegions = { 8 , 8 },
52- .focusRegions = { 8 , 8 },
53- .numHistogramBins = 1024 ,
54- .numGammaPoints = 64 ,
55- .pipelineWidth = 16 ,
56- .statsInline = true ,
57-
58- /*
59- * The constraint below is on the rate of pixels going
60- * from CSI2 peripheral to ISP-FE (400Mpix/s, plus tiny
61- * overheads per scanline, for which 380Mpix/s is a
62- * conservative bound).
63- *
64- * There is a 64kbit data FIFO before the bottleneck,
65- * which means that in all reasonable cases the
66- * constraint applies at a timescale >= 1 scanline, so
67- * adding horizontal blanking can prevent loss.
68- *
69- * If the backlog were to grow beyond 64kbit during a
70- * single scanline, there could still be loss. This
71- * could happen using 4 lanes at 1.5Gbps at 10bpp with
72- * frames wider than ~16,000 pixels.
73- */
74- .minPixelProcessingTime = 1 .0us / 380 ,
75- .dataBufferStrided = false ,
76- }
77- },
78- };
50+ " pisp" ,
51+ {
52+ .agcRegions = { 0 , 0 },
53+ .agcZoneWeights = { 15 , 15 },
54+ .awbRegions = { 32 , 32 },
55+ .cacRegions = { 8 , 8 },
56+ .focusRegions = { 8 , 8 },
57+ .numHistogramBins = 1024 ,
58+ .numGammaPoints = 64 ,
59+ .pipelineWidth = 16 ,
60+ .statsInline = true ,
61+
62+ /*
63+ * The constraint below is on the rate of pixels going
64+ * from CSI2 peripheral to ISP-FE (400Mpix/s, plus tiny
65+ * overheads per scanline, for which 380Mpix/s is a
66+ * conservative bound).
67+ *
68+ * There is a 64kbit data FIFO before the bottleneck,
69+ * which means that in all reasonable cases the
70+ * constraint applies at a timescale >= 1 scanline, so
71+ * adding horizontal blanking can prevent loss.
72+ *
73+ * If the backlog were to grow beyond 64kbit during a
74+ * single scanline, there could still be loss. This
75+ * could happen using 4 lanes at 1.5Gbps at 10bpp with
76+ * frames wider than ~16,000 pixels.
77+ */
78+ .minPixelProcessingTime = 1 .0us / 380 ,
79+ .dataBufferStrided = false ,
80+ }
81+ },
82+ };
83+
84+ return map;
85+ }
86+
87+ } /* namespace */
7988
8089Controller::Controller ()
8190 : switchModeCalled_(false )
@@ -211,12 +220,12 @@ const std::string &Controller::getTarget() const
211220
212221const Controller::HardwareConfig &Controller::getHardwareConfig () const
213222{
214- auto cfg = HardwareConfigMap .find (getTarget ());
223+ auto cfg = hardwareConfigMap () .find (getTarget ());
215224
216225 /*
217226 * This really should not happen, the IPA ought to validate the target
218227 * on initialisation.
219228 */
220- ASSERT (cfg != HardwareConfigMap .end ());
229+ ASSERT (cfg != hardwareConfigMap () .end ());
221230 return cfg->second ;
222231}
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