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willdeacongregkh
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KVM: arm64: Don't defer TLB invalidation when zapping table entries
commit f62d4c3 upstream. Commit 7657ea9 ("KVM: arm64: Use TLBI range-based instructions for unmap") introduced deferred TLB invalidation for the stage-2 page-table so that range-based invalidation can be used for the accumulated addresses. This works fine if the structure of the page-tables remains unchanged, but if entire tables are zapped and subsequently freed then we transiently leave the hardware page-table walker with a reference to freed memory thanks to the translation walk caches. For example, stage2_unmap_walker() will free page-table pages: if (childp) mm_ops->put_page(childp); and issue the TLB invalidation later in kvm_pgtable_stage2_unmap(): if (stage2_unmap_defer_tlb_flush(pgt)) /* Perform the deferred TLB invalidations */ kvm_tlb_flush_vmid_range(pgt->mmu, addr, size); For now, take the conservative approach and invalidate the TLB eagerly when we clear a table entry. Note, however, that the existing level hint passed to __kvm_tlb_flush_vmid_ipa() is incorrect and will be fixed in a subsequent patch. Cc: Raghavendra Rao Ananta <[email protected]> Cc: Shaoqin Huang <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Oliver Upton <[email protected]> Reviewed-by: Shaoqin Huang <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]> Cc: <[email protected]> # 6.6.y only Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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arch/arm64/kvm/hyp/pgtable.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -861,9 +861,11 @@ static void stage2_unmap_put_pte(const struct kvm_pgtable_visit_ctx *ctx,
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if (kvm_pte_valid(ctx->old)) {
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kvm_clear_pte(ctx->ptep);
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if (!stage2_unmap_defer_tlb_flush(pgt))
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if (!stage2_unmap_defer_tlb_flush(pgt) ||
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kvm_pte_table(ctx->old, ctx->level)) {
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kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, mmu,
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ctx->addr, ctx->level);
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}
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}
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mm_ops->put_page(ctx->ptep);

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