@@ -69,15 +69,13 @@ struct raspberrypi_clk_variant {
6969 unsigned long min_rate ;
7070 bool minimize ;
7171 bool maximize ;
72- u32 flags ;
7372};
7473
7574static struct raspberrypi_clk_variant
7675raspberrypi_clk_variants [RPI_FIRMWARE_NUM_CLK_ID ] = {
7776 [RPI_FIRMWARE_ARM_CLK_ID ] = {
7877 .export = true,
7978 .clkdev = "cpu0" ,
80- .flags = CLK_IS_CRITICAL ,
8179 },
8280 [RPI_FIRMWARE_CORE_CLK_ID ] = {
8381 .export = true,
@@ -93,12 +91,6 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
9391 * always use the minimum the drivers will let us.
9492 */
9593 .minimize = true,
96-
97- /*
98- * It should never be disabled as it drives the bus for
99- * everything else.
100- */
101- .flags = CLK_IS_CRITICAL ,
10294 },
10395 [RPI_FIRMWARE_M2MC_CLK_ID ] = {
10496 .export = true,
@@ -124,15 +116,6 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
124116 * drivers will let us.
125117 */
126118 .minimize = true,
127-
128- /*
129- * As mentioned above, this clock is disabled during boot,
130- * the firmware will skip the HSM initialization, resulting
131- * in a bus lockup. Therefore, make sure it's enabled
132- * during boot, but after it, it can be enabled/disabled
133- * by the driver.
134- */
135- .flags = CLK_IGNORE_UNUSED ,
136119 },
137120 [RPI_FIRMWARE_V3D_CLK_ID ] = {
138121 .export = true,
@@ -141,12 +124,10 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
141124 [RPI_FIRMWARE_PIXEL_CLK_ID ] = {
142125 .export = true,
143126 .minimize = true,
144- .flags = CLK_IS_CRITICAL ,
145127 },
146128 [RPI_FIRMWARE_HEVC_CLK_ID ] = {
147129 .export = true,
148130 .minimize = true,
149- .flags = CLK_IS_CRITICAL ,
150131 },
151132 [RPI_FIRMWARE_ISP_CLK_ID ] = {
152133 .export = true,
@@ -155,7 +136,6 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
155136 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID ] = {
156137 .export = true,
157138 .minimize = true,
158- .flags = CLK_IS_CRITICAL ,
159139 },
160140 [RPI_FIRMWARE_VEC_CLK_ID ] = {
161141 .export = true,
@@ -286,41 +266,7 @@ static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
286266 return 0 ;
287267}
288268
289- static int raspberrypi_fw_prepare (struct clk_hw * hw )
290- {
291- const struct raspberrypi_clk_data * data = clk_hw_to_data (hw );
292- struct raspberrypi_clk * rpi = data -> rpi ;
293- u32 state = RPI_FIRMWARE_STATE_ENABLE_BIT ;
294- int ret ;
295-
296- ret = raspberrypi_clock_property (rpi -> firmware , data ,
297- RPI_FIRMWARE_SET_CLOCK_STATE , & state );
298- if (ret )
299- dev_err_ratelimited (rpi -> dev ,
300- "Failed to set clock %s state to on: %d\n" ,
301- clk_hw_get_name (hw ), ret );
302-
303- return ret ;
304- }
305-
306- static void raspberrypi_fw_unprepare (struct clk_hw * hw )
307- {
308- const struct raspberrypi_clk_data * data = clk_hw_to_data (hw );
309- struct raspberrypi_clk * rpi = data -> rpi ;
310- u32 state = 0 ;
311- int ret ;
312-
313- ret = raspberrypi_clock_property (rpi -> firmware , data ,
314- RPI_FIRMWARE_SET_CLOCK_STATE , & state );
315- if (ret )
316- dev_err_ratelimited (rpi -> dev ,
317- "Failed to set clock %s state to off: %d\n" ,
318- clk_hw_get_name (hw ), ret );
319- }
320-
321269static const struct clk_ops raspberrypi_firmware_clk_ops = {
322- .prepare = raspberrypi_fw_prepare ,
323- .unprepare = raspberrypi_fw_unprepare ,
324270 .is_prepared = raspberrypi_fw_is_prepared ,
325271 .recalc_rate = raspberrypi_fw_get_rate ,
326272 .determine_rate = raspberrypi_fw_dumb_determine_rate ,
@@ -350,7 +296,7 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
350296 if (!init .name )
351297 return ERR_PTR (- ENOMEM );
352298 init .ops = & raspberrypi_firmware_clk_ops ;
353- init .flags = variant -> flags | CLK_GET_RATE_NOCACHE ;
299+ init .flags = CLK_GET_RATE_NOCACHE ;
354300
355301 data -> hw .init = & init ;
356302
0 commit comments