|
41 | 41 | #include <linux/hardirq.h> |
42 | 42 | #include <linux/atomic.h> |
43 | 43 | #include <linux/iommu.h> |
| 44 | +#include <linux/ubsan.h> |
44 | 45 |
|
45 | 46 | #include <asm/stacktrace.h> |
46 | 47 | #include <asm/processor.h> |
@@ -89,6 +90,47 @@ __always_inline int is_valid_bugaddr(unsigned long addr) |
89 | 90 | return *(unsigned short *)addr == INSN_UD2; |
90 | 91 | } |
91 | 92 |
|
| 93 | +/* |
| 94 | + * Check for UD1 or UD2, accounting for Address Size Override Prefixes. |
| 95 | + * If it's a UD1, get the ModRM byte to pass along to UBSan. |
| 96 | + */ |
| 97 | +__always_inline int decode_bug(unsigned long addr, u32 *imm) |
| 98 | +{ |
| 99 | + u8 v; |
| 100 | + |
| 101 | + if (addr < TASK_SIZE_MAX) |
| 102 | + return BUG_NONE; |
| 103 | + |
| 104 | + v = *(u8 *)(addr++); |
| 105 | + if (v == INSN_ASOP) |
| 106 | + v = *(u8 *)(addr++); |
| 107 | + if (v != OPCODE_ESCAPE) |
| 108 | + return BUG_NONE; |
| 109 | + |
| 110 | + v = *(u8 *)(addr++); |
| 111 | + if (v == SECOND_BYTE_OPCODE_UD2) |
| 112 | + return BUG_UD2; |
| 113 | + |
| 114 | + if (!IS_ENABLED(CONFIG_UBSAN_TRAP) || v != SECOND_BYTE_OPCODE_UD1) |
| 115 | + return BUG_NONE; |
| 116 | + |
| 117 | + /* Retrieve the immediate (type value) for the UBSAN UD1 */ |
| 118 | + v = *(u8 *)(addr++); |
| 119 | + if (X86_MODRM_RM(v) == 4) |
| 120 | + addr++; |
| 121 | + |
| 122 | + *imm = 0; |
| 123 | + if (X86_MODRM_MOD(v) == 1) |
| 124 | + *imm = *(u8 *)addr; |
| 125 | + else if (X86_MODRM_MOD(v) == 2) |
| 126 | + *imm = *(u32 *)addr; |
| 127 | + else |
| 128 | + WARN_ONCE(1, "Unexpected MODRM_MOD: %u\n", X86_MODRM_MOD(v)); |
| 129 | + |
| 130 | + return BUG_UD1; |
| 131 | +} |
| 132 | + |
| 133 | + |
92 | 134 | static nokprobe_inline int |
93 | 135 | do_trap_no_signal(struct task_struct *tsk, int trapnr, const char *str, |
94 | 136 | struct pt_regs *regs, long error_code) |
@@ -214,30 +256,37 @@ static inline void handle_invalid_op(struct pt_regs *regs) |
214 | 256 | static noinstr bool handle_bug(struct pt_regs *regs) |
215 | 257 | { |
216 | 258 | bool handled = false; |
| 259 | + int ud_type; |
| 260 | + u32 imm; |
217 | 261 |
|
218 | | - /* |
219 | | - * Normally @regs are unpoisoned by irqentry_enter(), but handle_bug() |
220 | | - * is a rare case that uses @regs without passing them to |
221 | | - * irqentry_enter(). |
222 | | - */ |
223 | | - kmsan_unpoison_entry_regs(regs); |
224 | | - if (!is_valid_bugaddr(regs->ip)) |
| 262 | + ud_type = decode_bug(regs->ip, &imm); |
| 263 | + if (ud_type == BUG_NONE) |
225 | 264 | return handled; |
226 | 265 |
|
227 | 266 | /* |
228 | 267 | * All lies, just get the WARN/BUG out. |
229 | 268 | */ |
230 | 269 | instrumentation_begin(); |
| 270 | + /* |
| 271 | + * Normally @regs are unpoisoned by irqentry_enter(), but handle_bug() |
| 272 | + * is a rare case that uses @regs without passing them to |
| 273 | + * irqentry_enter(). |
| 274 | + */ |
| 275 | + kmsan_unpoison_entry_regs(regs); |
231 | 276 | /* |
232 | 277 | * Since we're emulating a CALL with exceptions, restore the interrupt |
233 | 278 | * state to what it was at the exception site. |
234 | 279 | */ |
235 | 280 | if (regs->flags & X86_EFLAGS_IF) |
236 | 281 | raw_local_irq_enable(); |
237 | | - if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN || |
238 | | - handle_cfi_failure(regs) == BUG_TRAP_TYPE_WARN) { |
239 | | - regs->ip += LEN_UD2; |
240 | | - handled = true; |
| 282 | + if (ud_type == BUG_UD2) { |
| 283 | + if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN || |
| 284 | + handle_cfi_failure(regs) == BUG_TRAP_TYPE_WARN) { |
| 285 | + regs->ip += LEN_UD2; |
| 286 | + handled = true; |
| 287 | + } |
| 288 | + } else if (IS_ENABLED(CONFIG_UBSAN_TRAP)) { |
| 289 | + pr_crit("%s at %pS\n", report_ubsan_failure(regs, imm), (void *)regs->ip); |
241 | 290 | } |
242 | 291 | if (regs->flags & X86_EFLAGS_IF) |
243 | 292 | raw_local_irq_disable(); |
|
0 commit comments