drm/rp1/rp1_dsi: Move Composite Sync generation into the kernel

Move RP1 DPI's PIO-assisted Composite Sync generation code,
previously released as a separate utility, into the kernel driver.
There are 3 variants for progressive, generic interlaced and TV-
style interlaced CSync, alongside the existing VSync fixup.

Check that all of GPIOs 1-3 are mapped to DPI, so PIO won't try
to snoop on a missing output, or override another device's pins.

Add "force-csync" as both an OF property and a module parameter,
for convenience of testing, as few tools set DRM_MODE_FLAG_CSYNC.

Signed-off-by: Nick Hollinghurst <[email protected]>

Author: njhollinghurst

drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi.c

@@ -61,6 +61,16 @@
 static unsigned int default_bus_fmt = MEDIA_BUS_FMT_RGB666_1X18;
 module_param(default_bus_fmt, uint, 0644);
 
+/*
+ * Override DRM mode flags and OF flag to force the use of Composite Sync.
+ * This is mostly for testing, as neither panel-timing nor command-line
+ * arguments nor utilities such as "kmstest" can set DRM_MODE_FLAG_CSYNC
+ * (which, like interlace, is not strictly part of the DPI standard).
+ * Sampled on each enable/mode-switch. Default polarity will be -ve.
+ */
+static bool force_csync;
+module_param(force_csync, bool, 0644);
+
 /* -------------------------------------------------------------- */
 
 static void rp1dpi_pipe_update(struct drm_simple_display_pipe *pipe,
@@ -89,7 +99,8 @@ static void rp1dpi_pipe_update(struct drm_simple_display_pipe *pipe,
 						dpi->bus_fmt,
 						dpi->de_inv,
 						&pipe->crtc.state->mode);
-				rp1dpi_pio_start(dpi, &pipe->crtc.state->mode);
+				rp1dpi_pio_start(dpi, &pipe->crtc.state->mode,
+						 dpi->of_csync || force_csync);
 				dpi->dpi_running = true;
 			}
 			dpi->cur_fmt = fb->format->format;
@@ -354,6 +365,8 @@ static int rp1dpi_platform_probe(struct platform_device *pdev)
 	if (ret)
 		goto done_err;
 
+	/* Nonstandard options */
+	dpi->of_csync = of_property_read_bool(dev->of_node, "force-csync");
 	dpi->rgb_order_override = RP1DPI_ORDER_UNCHANGED;
 	if (!of_property_read_string(dev->of_node, "rgb_order", &rgb_order)) {
 		if (!strcmp(rgb_order, "rgb"))
@@ -368,9 +381,9 @@ static int rp1dpi_platform_probe(struct platform_device *pdev)
 			DRM_ERROR("Invalid dpi order %s - ignored\n", rgb_order);
 	}
 
-	/* Check if PIO can snoop on or override DPI's GPIO1 */
-	dpi->gpio1_used = false;
-	for (i = 0; !dpi->gpio1_used; i++) {
+	/* Check if all of GPIOs 1, 2 and 3 are assigned to DPI */
+	ret = 0;
+	for (i = 0; ret < 0xE; i++) {
 		u32 p = 0;
 		const char *str = NULL;
 		struct device_node *np1 = of_parse_phandle(dev->of_node, "pinctrl-0", i);
@@ -379,21 +392,26 @@ static int rp1dpi_platform_probe(struct platform_device *pdev)
 			break;
 
 		if (!of_property_read_string(np1, "function", &str) && !strcmp(str, "dpi")) {
-			for (j = 0; !dpi->gpio1_used; j++) {
+			for (j = 0; ret < 0xE; j++) {
 				if (of_property_read_string_index(np1, "pins", j, &str))
 					break;
 				if (!strcmp(str, "gpio1"))
-					dpi->gpio1_used = true;
+					ret |= BIT(1);
+				else if (!strcmp(str, "gpio2"))
+					ret |= BIT(2);
+				else if (!strcmp(str, "gpio3"))
+					ret |= BIT(3);
 			}
-			for (j = 0; !dpi->gpio1_used; j++) {
+			for (j = 0; ret < 3; j++) {
 				if (of_property_read_u32_index(np1, "brcm,pins", j, &p))
 					break;
-				if (p == 1)
-					dpi->gpio1_used = true;
+				if (p >= 1 && p <= 3)
+					ret |= (1 << p);
 			}
 		}
 		of_node_put(np1);
 	}
+	dpi->sync_gpios_mapped = (ret >= 0xE);
 
 	/* Now we have all our resources, finish driver initialization */
 	dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));

drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi.h

@@ -57,8 +57,7 @@ struct rp1_dpi {
 
 	/* Experimental stuff for interlace follows */
 	struct rp1_pio_client *pio;
-	bool gpio1_used;
-	bool pio_stole_gpio2;
+	bool of_csync, sync_gpios_mapped;
 
 	spinlock_t hw_lock; /* the following are used in line-match ISR */
 	dma_addr_t last_dma_addr;
@@ -91,5 +90,6 @@ void rp1dpi_vidout_poweroff(struct rp1_dpi *dpi);
 /* ---------------------------------------------------------------------- */
 /* PIO control -- we need PIO to generate VSync (from DE) when interlaced */
 
-int rp1dpi_pio_start(struct rp1_dpi *dpi, const struct drm_display_mode *mode);
+int rp1dpi_pio_start(struct rp1_dpi *dpi, const struct drm_display_mode *mode,
+		     bool force_csync);
 void rp1dpi_pio_stop(struct rp1_dpi *dpi);

drivers/gpu/drm/rp1/rp1-dpi/rp1_dpi_hw.c

@@ -392,7 +392,7 @@ void rp1dpi_hw_setup(struct rp1_dpi *dpi,
 	int order, i;
 
 	drm_info(&dpi->drm,
-		 "in_fmt=\'%c%c%c%c\' bus_fmt=0x%x mode=%dx%d total=%dx%d%s %dkHz %cH%cV%cD%cC",
+		 "in_fmt=\'%c%c%c%c\' bus_fmt=0x%x mode=%dx%d total=%dx%d%s %dkHz %cH%cV%cDE%cCK",
 		 in_format, in_format >> 8, in_format >> 16, in_format >> 24, bus_format,
 		 mode->hdisplay, mode->vdisplay,
 		 mode->htotal, mode->vtotal,
@@ -497,7 +497,7 @@ void rp1dpi_hw_setup(struct rp1_dpi *dpi,
 		 * This driver includes a PIO program to do that, when DE is enabled.
 		 *
 		 * An alternative fixup is to synthesize CSYNC from HSYNC and modified-VSYNC.
-		 * We don't implement that here, but to facilitate it, DPI's VSYNC is replaced
+		 * We can't do this and make VSYNC at the same time; DPI's VSYNC is replaced
 		 * by a "helper signal" that pulses low for 1 or 2 scan-lines, starting 2.0 or
 		 * 2.5 scan-lines respectively before nominal VSYNC start.
 		 */