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Merge remote-tracking branch 'stable/linux-6.6.y' into rpi-6.6.y
2 parents a651f95 + c1036e4 commit 5aa553a

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‎Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ properties:
6161
- gmii
6262
- rgmii
6363
- sgmii
64-
- 1000BaseX
64+
- 1000base-x
6565

6666
xlnx,phy-type:
6767
description:

‎Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: GPL-2.0
22
VERSION = 6
33
PATCHLEVEL = 6
4-
SUBLEVEL = 60
4+
SUBLEVEL = 62
55
EXTRAVERSION =
66
NAME = Pinguïn Aangedreven
77

‎arch/arm/boot/dts/rockchip/rk3036-kylin.dts‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -304,8 +304,8 @@
304304
&i2c2 {
305305
status = "okay";
306306

307-
rt5616: rt5616@1b {
308-
compatible = "rt5616";
307+
rt5616: audio-codec@1b {
308+
compatible = "realtek,rt5616";
309309
reg = <0x1b>;
310310
clocks = <&cru SCLK_I2S_OUT>;
311311
clock-names = "mclk";

‎arch/arm/boot/dts/rockchip/rk3036.dtsi‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -382,12 +382,13 @@
382382
};
383383
};
384384

385-
acodec: acodec-ana@20030000 {
386-
compatible = "rk3036-codec";
385+
acodec: audio-codec@20030000 {
386+
compatible = "rockchip,rk3036-codec";
387387
reg = <0x20030000 0x4000>;
388-
rockchip,grf = <&grf>;
389388
clock-names = "acodec_pclk";
390389
clocks = <&cru PCLK_ACODEC>;
390+
rockchip,grf = <&grf>;
391+
#sound-dai-cells = <0>;
391392
status = "disabled";
392393
};
393394

@@ -397,7 +398,6 @@
397398
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
398399
clocks = <&cru PCLK_HDMI>;
399400
clock-names = "pclk";
400-
rockchip,grf = <&grf>;
401401
pinctrl-names = "default";
402402
pinctrl-0 = <&hdmi_ctl>;
403403
status = "disabled";
@@ -550,11 +550,11 @@
550550
};
551551

552552
spi: spi@20074000 {
553-
compatible = "rockchip,rockchip-spi";
553+
compatible = "rockchip,rk3036-spi";
554554
reg = <0x20074000 0x1000>;
555555
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
556-
clocks = <&cru PCLK_SPI>, <&cru SCLK_SPI>;
557-
clock-names = "apb-pclk","spi_pclk";
556+
clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
557+
clock-names = "spiclk", "apb_pclk";
558558
dmas = <&pdma 8>, <&pdma 9>;
559559
dma-names = "tx", "rx";
560560
pinctrl-names = "default";

‎arch/arm64/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2178,6 +2178,7 @@ config ARM64_SME
21782178
bool "ARM Scalable Matrix Extension support"
21792179
default y
21802180
depends on ARM64_SVE
2181+
depends on BROKEN
21812182
help
21822183
The Scalable Matrix Extension (SME) is an extension to the AArch64
21832184
execution state which utilises a substantial subset of the SVE

‎arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ vpu: vpu@2c000000 {
1515
mu_m0: mailbox@2d000000 {
1616
compatible = "fsl,imx6sx-mu";
1717
reg = <0x2d000000 0x20000>;
18-
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
18+
interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>;
1919
#mbox-cells = <2>;
2020
power-domains = <&pd IMX_SC_R_VPU_MU_0>;
2121
status = "disabled";
@@ -24,7 +24,7 @@ vpu: vpu@2c000000 {
2424
mu1_m0: mailbox@2d020000 {
2525
compatible = "fsl,imx6sx-mu";
2626
reg = <0x2d020000 0x20000>;
27-
interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
27+
interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;
2828
#mbox-cells = <2>;
2929
power-domains = <&pd IMX_SC_R_VPU_MU_1>;
3030
status = "disabled";

‎arch/arm64/boot/dts/freescale/imx8mp.dtsi‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1257,7 +1257,7 @@
12571257
compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
12581258
reg = <0x30b40000 0x10000>;
12591259
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
1260-
clocks = <&clk IMX8MP_CLK_DUMMY>,
1260+
clocks = <&clk IMX8MP_CLK_IPG_ROOT>,
12611261
<&clk IMX8MP_CLK_NAND_USDHC_BUS>,
12621262
<&clk IMX8MP_CLK_USDHC1_ROOT>;
12631263
clock-names = "ipg", "ahb", "per";
@@ -1271,7 +1271,7 @@
12711271
compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
12721272
reg = <0x30b50000 0x10000>;
12731273
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1274-
clocks = <&clk IMX8MP_CLK_DUMMY>,
1274+
clocks = <&clk IMX8MP_CLK_IPG_ROOT>,
12751275
<&clk IMX8MP_CLK_NAND_USDHC_BUS>,
12761276
<&clk IMX8MP_CLK_USDHC2_ROOT>;
12771277
clock-names = "ipg", "ahb", "per";
@@ -1285,7 +1285,7 @@
12851285
compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
12861286
reg = <0x30b60000 0x10000>;
12871287
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1288-
clocks = <&clk IMX8MP_CLK_DUMMY>,
1288+
clocks = <&clk IMX8MP_CLK_IPG_ROOT>,
12891289
<&clk IMX8MP_CLK_NAND_USDHC_BUS>,
12901290
<&clk IMX8MP_CLK_USDHC3_ROOT>;
12911291
clock-names = "ipg", "ahb", "per";

‎arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
2+
/*
3+
* Copyright 2023 TQ-Systems GmbH <[email protected]>,
4+
* D-82229 Seefeld, Germany.
5+
* Author: Alexander Stein
6+
*/
7+
8+
&mu_m0 {
9+
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
10+
};
11+
12+
&mu1_m0 {
13+
interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
14+
};
15+
16+
&vpu_core0 {
17+
reg = <0x2d040000 0x10000>;
18+
};
19+
20+
&vpu_core1 {
21+
reg = <0x2d050000 0x10000>;
22+
};
23+
24+
/delete-node/ &mu2_m0;
25+
/delete-node/ &vpu_core2;

‎arch/arm64/boot/dts/freescale/imx8qxp.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,6 @@
4848
serial3 = &lpuart3;
4949
vpu-core0 = &vpu_core0;
5050
vpu-core1 = &vpu_core1;
51-
vpu-core2 = &vpu_core2;
5251
};
5352

5453
cpus {
@@ -317,6 +316,7 @@
317316
};
318317

319318
#include "imx8qxp-ss-img.dtsi"
319+
#include "imx8qxp-ss-vpu.dtsi"
320320
#include "imx8qxp-ss-adma.dtsi"
321321
#include "imx8qxp-ss-conn.dtsi"
322322
#include "imx8qxp-ss-lsio.dtsi"

‎arch/arm64/boot/dts/rockchip/Makefile‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
1717
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
1818
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
1919
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
20+
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
2021
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
2122
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
2223
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb

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