@@ -548,6 +548,49 @@ static const struct cci_reg_sequence mode_common_regs[] = {
548548 {CCI_REG8 (0x0350 ), 0x00 },
549549 {CCI_REG8 (0xbcf1 ), 0x02 },
550550 {CCI_REG8 (0x3ff9 ), 0x01 },
551+ {CCI_REG8 (0x0220 ), 0x00 },
552+ {CCI_REG8 (0x0221 ), 0x11 },
553+ {CCI_REG8 (0x0381 ), 0x01 },
554+ {CCI_REG8 (0x0383 ), 0x01 },
555+ {CCI_REG8 (0x0385 ), 0x01 },
556+ {CCI_REG8 (0x0387 ), 0x01 },
557+ {CCI_REG8 (0x0902 ), 0x02 },
558+ {CCI_REG8 (0x3140 ), 0x02 },
559+ {CCI_REG8 (0x3c00 ), 0x00 },
560+ {CCI_REG8 (0x9e9a ), 0x2f },
561+ {CCI_REG8 (0x9e9b ), 0x2f },
562+ {CCI_REG8 (0x9e9c ), 0x2f },
563+ {CCI_REG8 (0x9e9d ), 0x00 },
564+ {CCI_REG8 (0x9e9e ), 0x00 },
565+ {CCI_REG8 (0x9e9f ), 0x00 },
566+ {CCI_REG8 (0x0301 ), 0x05 },
567+ {CCI_REG8 (0x0303 ), 0x02 },
568+ {CCI_REG8 (0x030b ), 0x02 },
569+ {CCI_REG8 (0x030d ), 0x02 },
570+ {CCI_REG8 (0x0310 ), 0x01 },
571+ {CCI_REG8 (0x0820 ), 0x07 },
572+ {CCI_REG8 (0x0821 ), 0x08 },
573+ {CCI_REG8 (0x0822 ), 0x00 },
574+ {CCI_REG8 (0x0823 ), 0x00 },
575+ {CCI_REG8 (0x080a ), 0x00 },
576+ {CCI_REG8 (0x080b ), 0x7f },
577+ {CCI_REG8 (0x080c ), 0x00 },
578+ {CCI_REG8 (0x080d ), 0x4f },
579+ {CCI_REG8 (0x080e ), 0x00 },
580+ {CCI_REG8 (0x080f ), 0x77 },
581+ {CCI_REG8 (0x0810 ), 0x00 },
582+ {CCI_REG8 (0x0811 ), 0x5f },
583+ {CCI_REG8 (0x0812 ), 0x00 },
584+ {CCI_REG8 (0x0813 ), 0x57 },
585+ {CCI_REG8 (0x0814 ), 0x00 },
586+ {CCI_REG8 (0x0815 ), 0x4f },
587+ {CCI_REG8 (0x0816 ), 0x01 },
588+ {CCI_REG8 (0x0817 ), 0x27 },
589+ {CCI_REG8 (0x0818 ), 0x00 },
590+ {CCI_REG8 (0x0819 ), 0x3f },
591+ {CCI_REG8 (0x3e20 ), 0x01 },
592+ {CCI_REG8 (0x3e37 ), 0x00 },
593+ {CCI_REG8 (0x3f50 ), 0x00 },
551594};
552595
553596/* 12 mpix 10fps */
@@ -566,17 +609,8 @@ static const struct cci_reg_sequence mode_4056x3040_regs[] = {
566609 {CCI_REG8 (0x00fd ), 0x0a },
567610 {CCI_REG8 (0x00fe ), 0x0a },
568611 {CCI_REG8 (0x00ff ), 0x0a },
569- {CCI_REG8 (0x0220 ), 0x00 },
570- {CCI_REG8 (0x0221 ), 0x11 },
571- {CCI_REG8 (0x0381 ), 0x01 },
572- {CCI_REG8 (0x0383 ), 0x01 },
573- {CCI_REG8 (0x0385 ), 0x01 },
574- {CCI_REG8 (0x0387 ), 0x01 },
575612 {CCI_REG8 (0x0900 ), 0x00 },
576613 {CCI_REG8 (0x0901 ), 0x11 },
577- {CCI_REG8 (0x0902 ), 0x02 },
578- {CCI_REG8 (0x3140 ), 0x02 },
579- {CCI_REG8 (0x3c00 ), 0x00 },
580614 {CCI_REG8 (0x3c01 ), 0x03 },
581615 {CCI_REG8 (0x3c02 ), 0xa2 },
582616 {CCI_REG8 (0x3f0d ), 0x01 },
@@ -595,12 +629,6 @@ static const struct cci_reg_sequence mode_4056x3040_regs[] = {
595629 {CCI_REG8 (0x936d ), 0x28 },
596630 {CCI_REG8 (0x9304 ), 0x00 },
597631 {CCI_REG8 (0x9305 ), 0x00 },
598- {CCI_REG8 (0x9e9a ), 0x2f },
599- {CCI_REG8 (0x9e9b ), 0x2f },
600- {CCI_REG8 (0x9e9c ), 0x2f },
601- {CCI_REG8 (0x9e9d ), 0x00 },
602- {CCI_REG8 (0x9e9e ), 0x00 },
603- {CCI_REG8 (0x9e9f ), 0x00 },
604632 {CCI_REG8 (0xa2a9 ), 0x60 },
605633 {CCI_REG8 (0xa2b7 ), 0x00 },
606634 {CCI_REG8 (0x0401 ), 0x00 },
@@ -618,42 +646,14 @@ static const struct cci_reg_sequence mode_4056x3040_regs[] = {
618646 {CCI_REG8 (0x034d ), 0xd8 },
619647 {CCI_REG8 (0x034e ), 0x0b },
620648 {CCI_REG8 (0x034f ), 0xe0 },
621- {CCI_REG8 (0x0301 ), 0x05 },
622- {CCI_REG8 (0x0303 ), 0x02 },
623649 {CCI_REG8 (0x0305 ), 0x04 },
624650 {CCI_REG8 (0x0306 ), 0x01 },
625651 {CCI_REG8 (0x0307 ), 0x5e },
626652 {CCI_REG8 (0x0309 ), 0x0c },
627- {CCI_REG8 (0x030b ), 0x02 },
628- {CCI_REG8 (0x030d ), 0x02 },
629- {CCI_REG8 (0x0310 ), 0x01 },
630- {CCI_REG8 (0x0820 ), 0x07 },
631- {CCI_REG8 (0x0821 ), 0x08 },
632- {CCI_REG8 (0x0822 ), 0x00 },
633- {CCI_REG8 (0x0823 ), 0x00 },
634- {CCI_REG8 (0x080a ), 0x00 },
635- {CCI_REG8 (0x080b ), 0x7f },
636- {CCI_REG8 (0x080c ), 0x00 },
637- {CCI_REG8 (0x080d ), 0x4f },
638- {CCI_REG8 (0x080e ), 0x00 },
639- {CCI_REG8 (0x080f ), 0x77 },
640- {CCI_REG8 (0x0810 ), 0x00 },
641- {CCI_REG8 (0x0811 ), 0x5f },
642- {CCI_REG8 (0x0812 ), 0x00 },
643- {CCI_REG8 (0x0813 ), 0x57 },
644- {CCI_REG8 (0x0814 ), 0x00 },
645- {CCI_REG8 (0x0815 ), 0x4f },
646- {CCI_REG8 (0x0816 ), 0x01 },
647- {CCI_REG8 (0x0817 ), 0x27 },
648- {CCI_REG8 (0x0818 ), 0x00 },
649- {CCI_REG8 (0x0819 ), 0x3f },
650653 {CCI_REG8 (0xe04c ), 0x00 },
651654 {CCI_REG8 (0xe04d ), 0x7f },
652655 {CCI_REG8 (0xe04e ), 0x00 },
653656 {CCI_REG8 (0xe04f ), 0x1f },
654- {CCI_REG8 (0x3e20 ), 0x01 },
655- {CCI_REG8 (0x3e37 ), 0x00 },
656- {CCI_REG8 (0x3f50 ), 0x00 },
657657 {CCI_REG8 (0x3f56 ), 0x02 },
658658 {CCI_REG8 (0x3f57 ), 0xae },
659659};
@@ -668,17 +668,8 @@ static const struct cci_reg_sequence mode_2028x1520_regs[] = {
668668 {CCI_REG8 (0x0349 ), 0xd7 },
669669 {CCI_REG8 (0x034a ), 0x0b },
670670 {CCI_REG8 (0x034b ), 0xdf },
671- {CCI_REG8 (0x0220 ), 0x00 },
672- {CCI_REG8 (0x0221 ), 0x11 },
673- {CCI_REG8 (0x0381 ), 0x01 },
674- {CCI_REG8 (0x0383 ), 0x01 },
675- {CCI_REG8 (0x0385 ), 0x01 },
676- {CCI_REG8 (0x0387 ), 0x01 },
677671 {CCI_REG8 (0x0900 ), 0x01 },
678672 {CCI_REG8 (0x0901 ), 0x22 },
679- {CCI_REG8 (0x0902 ), 0x02 },
680- {CCI_REG8 (0x3140 ), 0x02 },
681- {CCI_REG8 (0x3c00 ), 0x00 },
682673 {CCI_REG8 (0x3c01 ), 0x03 },
683674 {CCI_REG8 (0x3c02 ), 0xa2 },
684675 {CCI_REG8 (0x3f0d ), 0x01 },
@@ -692,12 +683,6 @@ static const struct cci_reg_sequence mode_2028x1520_regs[] = {
692683 {CCI_REG8 (0x936d ), 0x5f },
693684 {CCI_REG8 (0x9304 ), 0x00 },
694685 {CCI_REG8 (0x9305 ), 0x00 },
695- {CCI_REG8 (0x9e9a ), 0x2f },
696- {CCI_REG8 (0x9e9b ), 0x2f },
697- {CCI_REG8 (0x9e9c ), 0x2f },
698- {CCI_REG8 (0x9e9d ), 0x00 },
699- {CCI_REG8 (0x9e9e ), 0x00 },
700- {CCI_REG8 (0x9e9f ), 0x00 },
701686 {CCI_REG8 (0xa2a9 ), 0x60 },
702687 {CCI_REG8 (0xa2b7 ), 0x00 },
703688 {CCI_REG8 (0x0401 ), 0x00 },
@@ -715,42 +700,14 @@ static const struct cci_reg_sequence mode_2028x1520_regs[] = {
715700 {CCI_REG8 (0x034d ), 0xec },
716701 {CCI_REG8 (0x034e ), 0x05 },
717702 {CCI_REG8 (0x034f ), 0xf0 },
718- {CCI_REG8 (0x0301 ), 0x05 },
719- {CCI_REG8 (0x0303 ), 0x02 },
720703 {CCI_REG8 (0x0305 ), 0x04 },
721704 {CCI_REG8 (0x0306 ), 0x01 },
722705 {CCI_REG8 (0x0307 ), 0x5e },
723706 {CCI_REG8 (0x0309 ), 0x0c },
724- {CCI_REG8 (0x030b ), 0x02 },
725- {CCI_REG8 (0x030d ), 0x02 },
726- {CCI_REG8 (0x0310 ), 0x01 },
727- {CCI_REG8 (0x0820 ), 0x07 },
728- {CCI_REG8 (0x0821 ), 0x08 },
729- {CCI_REG8 (0x0822 ), 0x00 },
730- {CCI_REG8 (0x0823 ), 0x00 },
731- {CCI_REG8 (0x080a ), 0x00 },
732- {CCI_REG8 (0x080b ), 0x7f },
733- {CCI_REG8 (0x080c ), 0x00 },
734- {CCI_REG8 (0x080d ), 0x4f },
735- {CCI_REG8 (0x080e ), 0x00 },
736- {CCI_REG8 (0x080f ), 0x77 },
737- {CCI_REG8 (0x0810 ), 0x00 },
738- {CCI_REG8 (0x0811 ), 0x5f },
739- {CCI_REG8 (0x0812 ), 0x00 },
740- {CCI_REG8 (0x0813 ), 0x57 },
741- {CCI_REG8 (0x0814 ), 0x00 },
742- {CCI_REG8 (0x0815 ), 0x4f },
743- {CCI_REG8 (0x0816 ), 0x01 },
744- {CCI_REG8 (0x0817 ), 0x27 },
745- {CCI_REG8 (0x0818 ), 0x00 },
746- {CCI_REG8 (0x0819 ), 0x3f },
747707 {CCI_REG8 (0xe04c ), 0x00 },
748708 {CCI_REG8 (0xe04d ), 0x7f },
749709 {CCI_REG8 (0xe04e ), 0x00 },
750710 {CCI_REG8 (0xe04f ), 0x1f },
751- {CCI_REG8 (0x3e20 ), 0x01 },
752- {CCI_REG8 (0x3e37 ), 0x00 },
753- {CCI_REG8 (0x3f50 ), 0x00 },
754711 {CCI_REG8 (0x3f56 ), 0x01 },
755712 {CCI_REG8 (0x3f57 ), 0x6c },
756713};
@@ -765,17 +722,8 @@ static const struct cci_reg_sequence mode_2028x1080_regs[] = {
765722 {CCI_REG8 (0x0349 ), 0xd7 },
766723 {CCI_REG8 (0x034a ), 0x0a },
767724 {CCI_REG8 (0x034b ), 0x27 },
768- {CCI_REG8 (0x0220 ), 0x00 },
769- {CCI_REG8 (0x0221 ), 0x11 },
770- {CCI_REG8 (0x0381 ), 0x01 },
771- {CCI_REG8 (0x0383 ), 0x01 },
772- {CCI_REG8 (0x0385 ), 0x01 },
773- {CCI_REG8 (0x0387 ), 0x01 },
774725 {CCI_REG8 (0x0900 ), 0x01 },
775726 {CCI_REG8 (0x0901 ), 0x22 },
776- {CCI_REG8 (0x0902 ), 0x02 },
777- {CCI_REG8 (0x3140 ), 0x02 },
778- {CCI_REG8 (0x3c00 ), 0x00 },
779727 {CCI_REG8 (0x3c01 ), 0x03 },
780728 {CCI_REG8 (0x3c02 ), 0xa2 },
781729 {CCI_REG8 (0x3f0d ), 0x01 },
@@ -789,12 +737,6 @@ static const struct cci_reg_sequence mode_2028x1080_regs[] = {
789737 {CCI_REG8 (0x936d ), 0x5f },
790738 {CCI_REG8 (0x9304 ), 0x00 },
791739 {CCI_REG8 (0x9305 ), 0x00 },
792- {CCI_REG8 (0x9e9a ), 0x2f },
793- {CCI_REG8 (0x9e9b ), 0x2f },
794- {CCI_REG8 (0x9e9c ), 0x2f },
795- {CCI_REG8 (0x9e9d ), 0x00 },
796- {CCI_REG8 (0x9e9e ), 0x00 },
797- {CCI_REG8 (0x9e9f ), 0x00 },
798740 {CCI_REG8 (0xa2a9 ), 0x60 },
799741 {CCI_REG8 (0xa2b7 ), 0x00 },
800742 {CCI_REG8 (0x0401 ), 0x00 },
@@ -812,42 +754,14 @@ static const struct cci_reg_sequence mode_2028x1080_regs[] = {
812754 {CCI_REG8 (0x034d ), 0xec },
813755 {CCI_REG8 (0x034e ), 0x04 },
814756 {CCI_REG8 (0x034f ), 0x38 },
815- {CCI_REG8 (0x0301 ), 0x05 },
816- {CCI_REG8 (0x0303 ), 0x02 },
817757 {CCI_REG8 (0x0305 ), 0x04 },
818758 {CCI_REG8 (0x0306 ), 0x01 },
819759 {CCI_REG8 (0x0307 ), 0x5e },
820760 {CCI_REG8 (0x0309 ), 0x0c },
821- {CCI_REG8 (0x030b ), 0x02 },
822- {CCI_REG8 (0x030d ), 0x02 },
823- {CCI_REG8 (0x0310 ), 0x01 },
824- {CCI_REG8 (0x0820 ), 0x07 },
825- {CCI_REG8 (0x0821 ), 0x08 },
826- {CCI_REG8 (0x0822 ), 0x00 },
827- {CCI_REG8 (0x0823 ), 0x00 },
828- {CCI_REG8 (0x080a ), 0x00 },
829- {CCI_REG8 (0x080b ), 0x7f },
830- {CCI_REG8 (0x080c ), 0x00 },
831- {CCI_REG8 (0x080d ), 0x4f },
832- {CCI_REG8 (0x080e ), 0x00 },
833- {CCI_REG8 (0x080f ), 0x77 },
834- {CCI_REG8 (0x0810 ), 0x00 },
835- {CCI_REG8 (0x0811 ), 0x5f },
836- {CCI_REG8 (0x0812 ), 0x00 },
837- {CCI_REG8 (0x0813 ), 0x57 },
838- {CCI_REG8 (0x0814 ), 0x00 },
839- {CCI_REG8 (0x0815 ), 0x4f },
840- {CCI_REG8 (0x0816 ), 0x01 },
841- {CCI_REG8 (0x0817 ), 0x27 },
842- {CCI_REG8 (0x0818 ), 0x00 },
843- {CCI_REG8 (0x0819 ), 0x3f },
844761 {CCI_REG8 (0xe04c ), 0x00 },
845762 {CCI_REG8 (0xe04d ), 0x7f },
846763 {CCI_REG8 (0xe04e ), 0x00 },
847764 {CCI_REG8 (0xe04f ), 0x1f },
848- {CCI_REG8 (0x3e20 ), 0x01 },
849- {CCI_REG8 (0x3e37 ), 0x00 },
850- {CCI_REG8 (0x3f50 ), 0x00 },
851765 {CCI_REG8 (0x3f56 ), 0x01 },
852766 {CCI_REG8 (0x3f57 ), 0x6c },
853767};
@@ -915,12 +829,6 @@ static const struct cci_reg_sequence mode_1332x990_regs[] = {
915829 {CCI_REG8 (0x936d ), 0x5f },
916830 {CCI_REG8 (0x9304 ), 0x03 },
917831 {CCI_REG8 (0x9305 ), 0x80 },
918- {CCI_REG8 (0x9e9a ), 0x2f },
919- {CCI_REG8 (0x9e9b ), 0x2f },
920- {CCI_REG8 (0x9e9c ), 0x2f },
921- {CCI_REG8 (0x9e9d ), 0x00 },
922- {CCI_REG8 (0x9e9e ), 0x00 },
923- {CCI_REG8 (0x9e9f ), 0x00 },
924832 {CCI_REG8 (0xa2a9 ), 0x27 },
925833 {CCI_REG8 (0xa2b7 ), 0x03 },
926834 {CCI_REG8 (0x0401 ), 0x00 },
@@ -938,42 +846,14 @@ static const struct cci_reg_sequence mode_1332x990_regs[] = {
938846 {CCI_REG8 (0x034d ), 0x34 },
939847 {CCI_REG8 (0x034e ), 0x03 },
940848 {CCI_REG8 (0x034f ), 0xde },
941- {CCI_REG8 (0x0301 ), 0x05 },
942- {CCI_REG8 (0x0303 ), 0x02 },
943849 {CCI_REG8 (0x0305 ), 0x02 },
944850 {CCI_REG8 (0x0306 ), 0x00 },
945851 {CCI_REG8 (0x0307 ), 0xaf },
946852 {CCI_REG8 (0x0309 ), 0x0a },
947- {CCI_REG8 (0x030b ), 0x02 },
948- {CCI_REG8 (0x030d ), 0x02 },
949- {CCI_REG8 (0x0310 ), 0x01 },
950- {CCI_REG8 (0x0820 ), 0x07 },
951- {CCI_REG8 (0x0821 ), 0x08 },
952- {CCI_REG8 (0x0822 ), 0x00 },
953- {CCI_REG8 (0x0823 ), 0x00 },
954- {CCI_REG8 (0x080a ), 0x00 },
955- {CCI_REG8 (0x080b ), 0x7f },
956- {CCI_REG8 (0x080c ), 0x00 },
957- {CCI_REG8 (0x080d ), 0x4f },
958- {CCI_REG8 (0x080e ), 0x00 },
959- {CCI_REG8 (0x080f ), 0x77 },
960- {CCI_REG8 (0x0810 ), 0x00 },
961- {CCI_REG8 (0x0811 ), 0x5f },
962- {CCI_REG8 (0x0812 ), 0x00 },
963- {CCI_REG8 (0x0813 ), 0x57 },
964- {CCI_REG8 (0x0814 ), 0x00 },
965- {CCI_REG8 (0x0815 ), 0x4f },
966- {CCI_REG8 (0x0816 ), 0x01 },
967- {CCI_REG8 (0x0817 ), 0x27 },
968- {CCI_REG8 (0x0818 ), 0x00 },
969- {CCI_REG8 (0x0819 ), 0x3f },
970853 {CCI_REG8 (0xe04c ), 0x00 },
971854 {CCI_REG8 (0xe04d ), 0x5f },
972855 {CCI_REG8 (0xe04e ), 0x00 },
973856 {CCI_REG8 (0xe04f ), 0x1f },
974- {CCI_REG8 (0x3e20 ), 0x01 },
975- {CCI_REG8 (0x3e37 ), 0x00 },
976- {CCI_REG8 (0x3f50 ), 0x00 },
977857 {CCI_REG8 (0x3f56 ), 0x00 },
978858 {CCI_REG8 (0x3f57 ), 0xbf },
979859};
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