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pmarques-devPaulo Marques
andauthored
coding style fixes, copyright waiver (#395)
Co-authored-by: Paulo Marques <[email protected]>
1 parent 654aabc commit 465a2a3

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pio/quadrature_encoder/quadrature_encoder.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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/**
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* Copyright (c) 2021-2023 pmarques-dev @ github
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* Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
Lines changed: 76 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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;
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; Copyright (c) 2021-2023 pmarques-dev @ github
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; Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
@@ -26,63 +26,63 @@
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; to sysclk / 10 (e.g., sysclk 125MHz, max step rate = 12.5 Msteps/sec)
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2828
; 00 state
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JMP update ; read 00
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JMP decrement ; read 01
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JMP increment ; read 10
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JMP update ; read 11
29+
JMP update ; read 00
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JMP decrement ; read 01
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JMP increment ; read 10
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JMP update ; read 11
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3434
; 01 state
35-
JMP increment ; read 00
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JMP update ; read 01
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JMP update ; read 10
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JMP decrement ; read 11
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JMP increment ; read 00
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JMP update ; read 01
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JMP update ; read 10
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JMP decrement ; read 11
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4040
; 10 state
41-
JMP decrement ; read 00
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JMP update ; read 01
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JMP update ; read 10
44-
JMP increment ; read 11
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JMP decrement ; read 00
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JMP update ; read 01
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JMP update ; read 10
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JMP increment ; read 11
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4646
; to reduce code size, the last 2 states are implemented in place and become the
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; target for the other jumps
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4949
; 11 state
50-
JMP update ; read 00
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JMP increment ; read 01
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JMP update ; read 00
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JMP increment ; read 01
5252
decrement:
53-
; note: the target of this instruction must be the next address, so that
54-
; the effect of the instruction does not depend on the value of Y. The
55-
; same is true for the "JMP X--" below. Basically "JMP Y--, <next addr>"
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; is just a pure "decrement Y" instruction, with no other side effects
57-
JMP Y--, update ; read 10
53+
; note: the target of this instruction must be the next address, so that
54+
; the effect of the instruction does not depend on the value of Y. The
55+
; same is true for the "JMP X--" below. Basically "JMP Y--, <next addr>"
56+
; is just a pure "decrement Y" instruction, with no other side effects
57+
JMP Y--, update ; read 10
5858

59-
; this is where the main loop starts
59+
; this is where the main loop starts
6060
.wrap_target
6161
update:
62-
MOV ISR, Y
63-
PUSH noblock
62+
MOV ISR, Y ; read 11
63+
PUSH noblock
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6565
sample_pins:
66-
; we shift into ISR the last state of the 2 input pins (now in OSR) and
67-
; the new state of the 2 pins, thus producing the 4 bit target for the
68-
; computed jump into the correct action for this state. Both the PUSH
69-
; above and the OUT below zero the other bits in ISR
70-
OUT ISR, 2
71-
IN PINS, 2
72-
73-
; save the state in the OSR, so that we can use ISR for other purposes
74-
MOV OSR, ISR
75-
; jump to the correct state machine action
76-
MOV PC, ISR
77-
78-
; the PIO does not have a increment instruction, so to do that we do a
79-
; negate, decrement, negate sequence
66+
; we shift into ISR the last state of the 2 input pins (now in OSR) and
67+
; the new state of the 2 pins, thus producing the 4 bit target for the
68+
; computed jump into the correct action for this state. Both the PUSH
69+
; above and the OUT below zero out the other bits in ISR
70+
OUT ISR, 2
71+
IN PINS, 2
72+
73+
; save the state in the OSR, so that we can use ISR for other purposes
74+
MOV OSR, ISR
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; jump to the correct state machine action
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MOV PC, ISR
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78+
; the PIO does not have a increment instruction, so to do that we do a
79+
; negate, decrement, negate sequence
8080
increment:
81-
MOV Y, ~Y
82-
JMP Y--, increment_cont
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MOV Y, ~Y
82+
JMP Y--, increment_cont
8383
increment_cont:
84-
MOV Y, ~Y
85-
.wrap ; the .wrap here avoids one jump instruction and saves a cycle too
84+
MOV Y, ~Y
85+
.wrap ; the .wrap here avoids one jump instruction and saves a cycle too
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8787

8888

@@ -97,46 +97,45 @@ increment_cont:
9797

9898
static inline void quadrature_encoder_program_init(PIO pio, uint sm, uint pin, int max_step_rate)
9999
{
100-
pio_sm_set_consecutive_pindirs(pio, sm, pin, 2, false);
101-
gpio_pull_up(pin);
102-
gpio_pull_up(pin + 1);
103-
104-
pio_sm_config c = quadrature_encoder_program_get_default_config(0);
105-
106-
sm_config_set_in_pins(&c, pin); // for WAIT, IN
107-
sm_config_set_jmp_pin(&c, pin); // for JMP
108-
// shift to left, autopull disabled
109-
sm_config_set_in_shift(&c, false, false, 32);
110-
// don't join FIFO's
111-
sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_NONE);
112-
113-
// passing "0" as the sample frequency,
114-
if (max_step_rate == 0) {
115-
sm_config_set_clkdiv(&c, 1.0);
116-
} else {
117-
// one state machine loop takes at most 10 cycles
118-
float div = (float)clock_get_hz(clk_sys) / (10 * max_step_rate);
119-
sm_config_set_clkdiv(&c, div);
120-
}
121-
122-
pio_sm_init(pio, sm, 0, &c);
123-
pio_sm_set_enabled(pio, sm, true);
100+
pio_sm_set_consecutive_pindirs(pio, sm, pin, 2, false);
101+
gpio_pull_up(pin);
102+
gpio_pull_up(pin + 1);
103+
104+
pio_sm_config c = quadrature_encoder_program_get_default_config(0);
105+
106+
sm_config_set_in_pins(&c, pin); // for WAIT, IN
107+
sm_config_set_jmp_pin(&c, pin); // for JMP
108+
// shift to left, autopull disabled
109+
sm_config_set_in_shift(&c, false, false, 32);
110+
// don't join FIFO's
111+
sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_NONE);
112+
113+
// passing "0" as the sample frequency,
114+
if (max_step_rate == 0) {
115+
sm_config_set_clkdiv(&c, 1.0);
116+
} else {
117+
// one state machine loop takes at most 10 cycles
118+
float div = (float)clock_get_hz(clk_sys) / (10 * max_step_rate);
119+
sm_config_set_clkdiv(&c, div);
120+
}
121+
122+
pio_sm_init(pio, sm, 0, &c);
123+
pio_sm_set_enabled(pio, sm, true);
124124
}
125125

126126
static inline int32_t quadrature_encoder_get_count(PIO pio, uint sm)
127127
{
128-
uint ret;
129-
int n;
130-
131-
// if the FIFO has N entries, we fetch them to drain the FIFO,
132-
// plus one entry which will be guaranteed to not be stale
133-
n = pio_sm_get_rx_fifo_level(pio, sm) + 1;
134-
while (n > 0) {
135-
ret = pio_sm_get_blocking(pio, sm);
136-
n--;
137-
}
138-
return ret;
128+
uint ret;
129+
int n;
130+
131+
// if the FIFO has N entries, we fetch them to drain the FIFO,
132+
// plus one entry which will be guaranteed to not be stale
133+
n = pio_sm_get_rx_fifo_level(pio, sm) + 1;
134+
while (n > 0) {
135+
ret = pio_sm_get_blocking(pio, sm);
136+
n--;
137+
}
138+
return ret;
139139
}
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141141
%}
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