Review fixup

Fixup for dividers 1.0-2.0 on RP2040

Improve docs

Author: will-v-pi

src/rp2_common/hardware_clocks/clocks.c

@@ -130,6 +130,12 @@ bool clock_configure_mhz(clock_handle_t clock, uint32_t src, uint32_t auxsrc, ui
         return false;
 
     uint32_t div = (uint32_t)((((uint32_t) src_freq_mhz) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / freq_mhz);
+#if PICO_RP2040
+    // on RP2040 only clock divider of 1, or  >= 2 are supported
+    if (div < (2u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB)) {
+        div = (1u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB);
+    }
+#endif
     uint32_t actual_freq = (uint32_t) ((((uint32_t) src_freq_mhz) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / div) * MHZ;
 
     clock_configure_internal(clock, src, auxsrc, actual_freq, div);

src/rp2_common/hardware_clocks/include/hardware/clocks.h

@@ -322,8 +322,17 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
  *  \ingroup hardware_clocks
  *
  * This function differs from clock_configure in that it does not configure the clocks as accurately,
- * but therefore doesn't need to bring in 64-bit division functions, reducing the code size.
+ * but therefore doesn't need to bring in 64-bit division functions, reducing the code size if 64-bit
+ * division is not otherwise used by the application.
  *
+ * \if rp2350_specific
+ * Note: The RP2350 clock hardware supports divisors from 1.0->65536.0 in steps of 1/65536
+ *
+ * \endif
+ * \if rp2040_specific
+ * Note: The RP2040 clock hardware only supports divisors of exactly 1.0 or 2.0->16777216.0 in steps of 1/256
+ * \endif
+ * 
  * See the tables in the description for details on the possible values for clock sources.
  *
  * \param clock The clock to configure