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Fix unreliable writes to cyw43.
We use a pio and dma to write to the cyw43 chip using spi. Normally you write an address and then read the data from that address, so the pio program does does a write then read. If you just want to write data in the case of uploading firmware we use the fdebug_tx_stall flag to work out if the pio has stalled waiting to read data which will never arrive. The theory is that this flag will also get set if the bus is busy. So we mistakenly think a write to cyw43 has completed. Wait for the dma write to complete before waiting for the pio to stall. Fixes #2206
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src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -231,7 +231,7 @@ int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_length, u
231231
return CYW43_FAIL_FAST_CHECK(-CYW43_EINVAL);
232232
}
233233

234-
bus_data_t *bus_data = (bus_data_t *)self->bus_data;
234+
volatile bus_data_t *bus_data = (bus_data_t *)self->bus_data;
235235
start_spi_comms(self);
236236
if (rx != NULL) {
237237
if (tx == NULL) {
@@ -308,11 +308,13 @@ int cyw43_spi_transfer(cyw43_int_t *self, const uint8_t *tx, size_t tx_length, u
308308

309309
dma_channel_configure(bus_data->dma_out, &out_config, &bus_data->pio->txf[bus_data->pio_sm], tx, tx_length / 4, true);
310310

311+
pio_sm_set_enabled(bus_data->pio, bus_data->pio_sm, true);
312+
dma_channel_wait_for_finish_blocking(bus_data->dma_out);
313+
311314
uint32_t fdebug_tx_stall = 1u << (PIO_FDEBUG_TXSTALL_LSB + bus_data->pio_sm);
312315
bus_data->pio->fdebug = fdebug_tx_stall;
313-
pio_sm_set_enabled(bus_data->pio, bus_data->pio_sm, true);
314316
while (!(bus_data->pio->fdebug & fdebug_tx_stall)) {
315-
tight_loop_contents(); // todo timeout
317+
tight_loop_contents();
316318
}
317319
__compiler_memory_barrier();
318320
pio_sm_set_enabled(bus_data->pio, bus_data->pio_sm, false);

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