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SYS_CLK_HZ
1 parent 11961b9 commit 6587f5cCopy full SHA for 6587f5c
src/rp2_common/hardware_clocks/scripts/vcocalc.py
@@ -62,6 +62,7 @@ def validRefdiv(string):
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PLL_SYS_VCO_FREQ_HZ={int((args.input * 1_000_000) / best_refdiv * best_fbdiv)}
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PLL_SYS_POSTDIV1={best_pd1}
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PLL_SYS_POSTDIV2={best_pd2}
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+ SYS_CLK_HZ={int((args.input * 1_000_000) / (best_refdiv * best_pd1 * best_pd2) * best_fbdiv)}
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)
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"""
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if not args.cmake_only:
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