@@ -47,10 +47,10 @@ extern "C" {
4747 */
4848enum pwm_clkdiv_mode
4949{
50- PWM_DIV_FREE_RUNNING , ///< Free-running counting at rate dictated by fractional divider
51- PWM_DIV_B_HIGH , ///< Fractional divider is gated by the PWM B pin
52- PWM_DIV_B_RISING , ///< Fractional divider advances with each rising edge of the PWM B pin
53- PWM_DIV_B_FALLING ///< Fractional divider advances with each falling edge of the PWM B pin
50+ PWM_DIV_FREE_RUNNING = 0 , ///< Free-running counting at rate dictated by fractional divider
51+ PWM_DIV_B_HIGH = 1 , ///< Fractional divider is gated by the PWM B pin
52+ PWM_DIV_B_RISING = 2 , ///< Fractional divider advances with each rising edge of the PWM B pin
53+ PWM_DIV_B_FALLING = 3 ///< Fractional divider advances with each falling edge of the PWM B pin
5454};
5555
5656enum pwm_chan
@@ -144,7 +144,10 @@ static inline void pwm_config_set_clkdiv_int(pwm_config *c, uint div) {
144144 * high level, rising edge or falling edge of the B pin input.
145145 */
146146static inline void pwm_config_set_clkdiv_mode (pwm_config * c , enum pwm_clkdiv_mode mode ) {
147- valid_params_if (PWM , mode >= PWM_DIV_FREE_RUNNING && mode <= PWM_DIV_B_FALLING );
147+ valid_params_if (PWM , mode == PWM_DIV_FREE_RUNNING ||
148+ mode == PWM_DIV_B_RISING ||
149+ mode == PWM_DIV_B_HIGH ||
150+ mode == PWM_DIV_B_FALLING );
148151 c -> csr = (c -> csr & ~PWM_CH0_CSR_DIVMODE_BITS )
149152 | (((uint )mode ) << PWM_CH0_CSR_DIVMODE_LSB );
150153}
@@ -414,7 +417,10 @@ static inline void pwm_set_output_polarity(uint slice_num, bool a, bool b) {
414417 */
415418static inline void pwm_set_clkdiv_mode (uint slice_num , enum pwm_clkdiv_mode mode ) {
416419 check_slice_num_param (slice_num );
417- valid_params_if (PWM , mode >= PWM_DIV_FREE_RUNNING && mode <= PWM_DIV_B_FALLING );
420+ valid_params_if (PWM , mode == PWM_DIV_FREE_RUNNING ||
421+ mode == PWM_DIV_B_RISING ||
422+ mode == PWM_DIV_B_HIGH ||
423+ mode == PWM_DIV_B_FALLING );
418424 hw_write_masked (& pwm_hw -> slice [slice_num ].csr , ((uint )mode ) << PWM_CH0_CSR_DIVMODE_LSB , PWM_CH0_CSR_DIVMODE_BITS );
419425}
420426
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