Merge remote-tracking branch develop into tmp-clang-test

Author: kilograham

src/rp2_common/hardware_clocks/clocks.c

@@ -102,6 +102,10 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
         return false;
 
     uint32_t div = (uint32_t)((((uint64_t) src_freq) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / freq);
+    // only clock divider of 1, or  >= 2 are supported
+    if (div < (2u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB)) {
+        div = (1u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB);
+    }
     uint32_t actual_freq = (uint32_t) ((((uint64_t) src_freq) << CLOCKS_CLK_GPOUT0_DIV_INT_LSB) / div);
 
     clock_configure_internal(clock, src, auxsrc, actual_freq, div);

src/rp2_common/hardware_clocks/include/hardware/clocks.h

@@ -262,11 +262,18 @@ extern "C" {
 
 typedef clock_num_t clock_handle_t;
 
-/*! \brief Configure the specified clock
+/*! \brief Configure the specified clock with automatic clock divisor setup
  *  \ingroup hardware_clocks
  *
+ * This method allows both the src_frequency of the input clock source AND the desired
+ * frequency to be specified, and will set the clock divider to achieve the exact or higher frequency
+ * achievable, with the maximum being the src_freq.
+ *
+ * Note: That the clock hardware only support divisors of exactly 1 or 2.0->65535.0
+ *
  * See the tables in the description for details on the possible values for clock sources.
  *
+ *
  * \param clock The clock to configure
  * \param src The main clock source, can be 0.
  * \param auxsrc The auxiliary clock source, which depends on which clock is being set. Can be 0
@@ -275,7 +282,7 @@ typedef clock_num_t clock_handle_t;
  */
 bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_freq, uint32_t freq);
 
-/*! \brief Configure the specified clock to use the undividded input source
+/*! \brief Configure the specified clock to use the undivided input source
  *  \ingroup hardware_clocks
  *
  * See the tables in the description for details on the possible values for clock sources.
@@ -287,7 +294,7 @@ bool clock_configure(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32
  */
 void clock_configure_undivided(clock_handle_t clock, uint32_t src, uint32_t auxsrc, uint32_t src_freq);
 
-/*! \brief Configure the specified clock to use the undividded input source
+/*! \brief Configure the specified clock to use the undivided input source
  *  \ingroup hardware_clocks
  *
  * See the tables in the description for details on the possible values for clock sources.

src/rp2_common/hardware_dma/include/hardware/dma.h

@@ -535,7 +535,7 @@ static inline void dma_channel_start(uint channel) {
  *\endcode
  *
  * \if rp2350_specific
- * RP2350 only: Due to errata RP12350-E5 (see the RP2350 datasheet for further detail), it is necessary to clear the enable bit of
+ * RP2350 only: Due to errata RP2350-E5 (see the RP2350 datasheet for further detail), it is necessary to clear the enable bit of
  * the aborted channel and any chained channels prior to the abort to prevent re-triggering.
  * \endif
  *

src/rp2_common/hardware_flash/flash.c

@@ -288,7 +288,7 @@ void flash_get_unique_id(uint8_t *id_out) {
 #if !PICO_RP2040
 // This is a static symbol because the layout of FLASH_DEVINFO is liable to change from device to
 // device, so fields must have getters/setters.
-static io_rw_16 * flash_devinfo_ptr(void) {
+static io_rw_16 * __no_inline_not_in_flash_func(flash_devinfo_ptr)(void) {
     // Note the lookup returns a pointer to a 32-bit pointer literal in the ROM
     io_rw_16 **p = (io_rw_16 **) rom_data_lookup_inline(ROM_DATA_FLASH_DEVINFO16_PTR);
     assert(p);

src/rp2_common/hardware_irq/include/hardware/irq.h

@@ -286,6 +286,33 @@ void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled);
  * This method will assert if there is already any sort of interrupt handler installed
  * for the specified irq number.
  *
+ * NOTE: By default, the SDK uses a single shared vector table per core, and the current installed
+ * IRQ handlers are effectively a linked list starting a vector table entry for a particular IRQ number.
+ * Therefore, this method (when using the same vector table for both cores) sets the same interrupt handler
+ * for both cores.
+ *
+ * On RP2040 this was never really a cause of any confusion, because it rarely made sense to enable
+ * the same interrupt number in the NVIC on both cores (see \ref irq_set_enabled()), because the interrupt
+ * would then fire on both cores, and the interrupt handlers would race.
+ *
+ * The problem *does* exist however when dealing with interrupts which are independent on the two cores.
+ *
+ * This includes:
+ *
+ * * the core local "spare" IRQs
+ * * on RP2350 the SIO FIFO IRQ which is now the same irq number for both cores (vs RP2040 where it was two)
+ *
+ * In the cases where you want to enable the same IRQ on both cores, and both cores are sharing the same vector
+ * table, you should install the IRQ handler once - it will be used on both cores - and check the core
+ * number (via \ref get_core_num()) on each core.
+ *
+ * NOTE: It is not thread safe to add/remove/handle IRQs for the same irq number in the same vector table
+ * from both cores concurrently.
+ *
+ * NOTE: The SDK defines a PICO_VTABLE_PER_CORE variable indicating whether the two vector tables are separate,
+ * however as of version 2.1.1 the user cannot set this value, and expect the vector table duplication to be handled
+ * for them. This functionality will be added in a future SDK version
+ *
  * \param num Interrupt number \ref interrupt_nums
  * \param handler The handler to set. See \ref irq_handler_t
  * \see irq_add_shared_handler()
@@ -316,6 +343,33 @@ irq_handler_t irq_get_exclusive_handler(uint num);
  * the (total across all IRQs on both cores) maximum (configurable via PICO_MAX_SHARED_IRQ_HANDLERS) number of shared handlers
  * would be exceeded.
  *
+ * NOTE: By default, the SDK uses a single shared vector table per core, and the current installed
+ * IRQ handlers are effectively a linked list starting a vector table entry for a particular IRQ number.
+ * Therefore, this method (when using the same vector table for both cores) add the same interrupt handler
+ * for both cores.
+ *
+ * On RP2040 this was never really a cause of any confusion, because it rarely made sense to enable
+ * the same interrupt number in the NVIC on both cores (see \ref irq_set_enabled()), because the interrupt
+ * would then fire on both cores, and the interrupt handlers would race.
+ *
+ * The problem *does* exist however when dealing with interrupts which are independent on the two cores.
+ *
+ * This includes:
+ *
+ * * the core local "spare" IRQs
+ * * on RP2350 the SIO FIFO IRQ which is now the same irq number for both cores (vs RP2040 where it was two)
+ *
+ * In the cases where you want to enable the same IRQ on both cores, and both cores are sharing the same vector
+ * table, you should install the IRQ handler once - it will be used on both cores - and check the core
+ * number (via \ref get_core_num()) on each core.
+ *
+ * NOTE: It is not thread safe to add/remove/handle IRQs for the same irq number in the same vector table
+ * from both cores concurrently.
+ *
+ * NOTE: The SDK defines a PICO_VTABLE_PER_CORE variable indicating whether the two vector tables are separate,
+ * however as of version 2.1.1 the user cannot set this value, and expect the vector table duplication to be handled
+ * for them. This functionality will be added in a future SDK version
+ *
  * \param num Interrupt number \ref interrupt_nums
  * \param handler The handler to set. See \ref irq_handler_t
  * \param order_priority The order priority controls the order that handlers for the same IRQ number on the core are called.

src/rp2_common/pico_double/double_aeabi_dcp.S

@@ -7,7 +7,7 @@
 #include "pico/asm_helper.S"
 
 #if !HAS_DOUBLE_COPROCESSOR
-#error attempt to compile double_aeabi_rp2350 when there is no DCP
+#error attempt to compile double_aeabi_dcp when there is no DCP
 #else
 
 #include "hardware/dcp_instr.inc.S"
@@ -29,7 +29,7 @@ double_section WRAPPER_FUNC_NAME(\func)
 
 // ============== STATE SAVE AND RESTORE ===============
 
-.macro saving_func type func
+.macro saving_func type func, opt_label1='-', opt_label2='-'
   // Note we are usually 32-bit aligned already at this point, as most of the
   // function bodies contain exactly two 16-bit instructions: bmi and bx lr.
   // We want the PCMP word-aligned.
@@ -41,6 +41,12 @@ double_section WRAPPER_FUNC_NAME(\func)
   push {lr}              // 16-bit instruction
   bl generic_save_state  // 32-bit instruction
   b 1f                   // 16-bit instruction
+.ifnc \opt_label1,'-'
+regular_func \opt_label1
+.endif
+.ifnc \opt_label2,'-'
+regular_func \opt_label2
+.endif
   // This is the actual entry point:
 \type\()_func \func
   PCMP apsr_nzcv
@@ -128,53 +134,124 @@ saving_func wrapper sqrt
   dcp_dsqrt_m r0,r1,r0,r1,r0,r1,r2,r3,r12
   saving_func_return
 
-// todo not a real thing
-double_wrapper_section __aeabi_dclassify
-saving_func wrapper __aeabi_dclassify
-@ with correct rounding
+double_section dclassify
+saving_func regular dclassify
   dcp_dclassify_m apsr_nzcv,r0,r1
   saving_func_return
 
 // ============== CONVERSION FUNCTIONS ===============
 
 double_wrapper_section __aeabi_d2f
-saving_func wrapper __aeabi_d2f
+saving_func wrapper __aeabi_d2f double2float
 @ with rounding
   dcp_double2float_m r0,r0,r1
   saving_func_return
 
 double_wrapper_section __aeabi_i2d
-saving_func wrapper __aeabi_i2d
+saving_func wrapper __aeabi_i2d int2double
   dcp_int2double_m r0,r1,r0
   saving_func_return
 
 double_wrapper_section __aeabi_ui2d
-saving_func wrapper __aeabi_ui2d
+saving_func wrapper __aeabi_ui2d uint2double
   dcp_uint2double_m r0,r1,r0
   saving_func_return
 
+double_section double2fix_z
+saving_func regular double2fix_z
+  ubfx r3, r1, #20, #11
+  adds r3, r2
+  beq 1f // very small; we don't care that we might make a denormal
+  asrs ip, r3, #11
+  beq 1f
+  ite pl
+  movpl r3, #0x7ff
+  movsmi r3, #0
+1:
+  bfi r1, r3, #20, #11
+  b double2int_z_entry
+
+double_section double2ufix
+saving_func regular double2ufix_z double2ufix
+double2ufix_z_entry:
+  ubfx r3, r1, #20, #11
+  adds r3, r2
+  beq 1f // very small; we don't care that we might make a denormal
+  asrs ip, r3, #11
+  beq 1f
+  ite pl
+  lsrspl r3, r1, #20 // 0x7ff
+  movsmi r3, #0
+1:
+  bfi r1, r3, #20, #11
+  b double2uint_z_entry
+
+double_section double2fix
+saving_func regular double2fix
+  ubfx r3, r1, #20, #11
+  cbz r3, 2f // 0 or denormal
+  adds r3, r2
+  beq 1f // very small; we don't care that we might make a denormal
+  asrs ip, r3, #11
+  beq 1f
+  ite pl
+  movpl r3, #0x7ff
+  movsmi r3, #0
+1:
+  bfi r1, r3, #20, #11
+  b double2int_entry
+2:
+  movs r0, #0
+saving_func_return
+
+
+double_section double2int
+saving_func regular double2int
+double2int_entry:
+  lsls r2, r1, #1
+  bcc double2int_z_entry // positive is ok for int64_z
+  lsrs r3, r2, #21
+  beq double2int_z_entry // 0 or -0 or denormal is ok for int_z
+
+  lsrs r2, #21
+  adds r2, #1
+  subs r2, r2, #0x400
+  bcc 1f // <1 means subtract 1
+  cmp r2, #31
+  bge double2int_z_entry // must be an integer or maxed out
+  lsls r3, r1, #12
+  adds r3, r3, r0, lsr #20 // r3 now has highest 32 mantissa bits
+  lsls r3, r2
+  orrs r3, r3, r0, lsl #12 // these bits are all guaranteed to be in the fraction
+  beq double2int_z_entry // integer
+1:
+  dcp_double2int_m r0,r0,r1
+  subs r0, #1
+saving_func_return
+
 double_wrapper_section __aeabi_d2iz
-saving_func wrapper __aeabi_d2iz
+saving_func wrapper __aeabi_d2iz double2int_z
+double2int_z_entry:
 @ with truncation towards 0
   dcp_double2int_m r0,r0,r1
+  // note: this works with either saved or not saved call as it is just a `bx lr`
   saving_func_return
 
 double_wrapper_section __aeabi_d2uiz
-saving_func wrapper __aeabi_d2uiz
+saving_func wrapper __aeabi_d2uiz double2uint double2uint_z
+double2uint_z_entry:
 @ with truncation towards 0
   dcp_double2uint_m r0,r0,r1
   saving_func_return
 
-// todo not a real thing
-double_wrapper_section __aeabi_d2i_r
-saving_func wrapper __aeabi_d2i_r
+double_section double2int_r
+saving_func regular double2int_r
 @ with rounding
   dcp_double2int_r_m r0,r0,r1
   saving_func_return
 
-// todo not a real thing
-double_wrapper_section __aeabi_d2ui_r
-saving_func wrapper __aeabi_d2ui_r
+double_section double2uint_r
+saving_func regular double2uint_r
 @ with rounding
   dcp_double2uint_r_m r0,r0,r1
   saving_func_return
@@ -189,7 +266,6 @@ saving_func wrapper __aeabi_dcmpun
   saving_func_return
 
 double_wrapper_section __aeabi_dcmp
-
 saving_func wrapper __aeabi_cdrcmple
   dcp_dcmp_m apsr_nzcv,r2,r3,r0,r1 // with arguments reversed
   bvs cmp_nan