6th-Sem-Microcontrollers/2_out_of_5_code.ewp at master · raunakpriya/6th-Sem-Microcontrollers · GitHub

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#include "msp430.h"                     ; #define controlled include file

ORG 0X3010

DW 0X2010

        NAME    main                    ; module name


        PUBLIC  main                    ; make the main label vissible

                                        ; outside this module

        ORG     0FFFEh

        DC16    init                    ; set reset vector to 'init' label


        RSEG    CSTACK                  ; pre-declaration of segment

        RSEG    CODE                    ; place program in 'CODE' segment


init:   MOV     #SFE(CSTACK), SP        ; set up stack


main:   NOP                             ; main program

        MOV.W   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer

CLR.W R5
CLR.W R8
CLR.W R6
CLR.W R7
MOV.B 0X3010(R5),R6
BIT.B #0X0E0,R6
JNZ DOWN
MOV.B #0X05,R7
UP: RRC.B R6
JNC DOWN2
INC R8
DOWN2: DEC R7
JNZ UP
CMP #0X02,R8
JNE DOWN
MOV.W #0X0AAAA,0X3020(R5)
JMP OVER
DOWN: MOV.W #0XFFFFF,0X3020(R5)
OVER: JMP $
END