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Merge pull request gevico#38 from AsakuraMizu/pr/style
add style check and format all files
2 parents cc10522 + 00ad2fa commit 820f30d

17 files changed

Lines changed: 158 additions & 523 deletions

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.github/workflows/check.yml

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
name: check
2+
3+
on:
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push:
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pull_request:
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7+
jobs:
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style:
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runs-on: ubuntu-latest
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steps:
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- name: Checkout machina
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uses: actions/checkout@v4
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14+
- name: Install Rust
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uses: dtolnay/rust-toolchain@stable
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- name: Check code formatting
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run: cargo fmt --all --check

accel/src/exec/exec_loop.rs

Lines changed: 12 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -129,17 +129,15 @@ where
129129
per_cpu.stats.hint_used += 1;
130130
idx
131131
}
132-
None => {
133-
match tb_find(shared, per_cpu, cpu, pc, flags) {
134-
Some(idx) => idx,
135-
None => {
136-
if cpu.check_mem_fault() {
137-
continue;
138-
}
139-
return ExitReason::BufferFull;
132+
None => match tb_find(shared, per_cpu, cpu, pc, flags) {
133+
Some(idx) => idx,
134+
None => {
135+
if cpu.check_mem_fault() {
136+
continue;
140137
}
138+
return ExitReason::BufferFull;
141139
}
142-
}
140+
},
143141
};
144142

145143
// GDB breakpoint within TB: if the found TB
@@ -149,14 +147,9 @@ where
149147
// boundary. The original TB stays in cache for
150148
// non-debug execution (QEMU cflags approach).
151149
let tb = shared.tb_store.get(idx);
152-
if cpu.gdb_breakpoint_in_tb(
153-
tb.pc,
154-
tb.size as u64,
155-
) {
150+
if cpu.gdb_breakpoint_in_tb(tb.pc, tb.size as u64) {
156151
let cf = CF_SINGLE_STEP | 1;
157-
match tb_gen_code_cflags(
158-
shared, per_cpu, cpu, pc, flags, cf,
159-
) {
152+
match tb_gen_code_cflags(shared, per_cpu, cpu, pc, flags, cf) {
160153
Some(ss_idx) => ss_idx,
161154
None => {
162155
if cpu.check_mem_fault() {
@@ -318,8 +311,7 @@ where
318311
// Illegal: TSR trap or U-mode sret.
319312
// PC points to next insn; rewind to
320313
// the sret itself for mepc.
321-
let cur =
322-
cpu.get_pc().wrapping_sub(4);
314+
let cur = cpu.get_pc().wrapping_sub(4);
323315
cpu.set_pc(cur);
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cpu.handle_exception(2, 0);
325317
}
@@ -341,10 +333,7 @@ where
341333
cpu.tlb_flush();
342334
shared
343335
.tb_store
344-
.invalidate_all(
345-
shared.code_buf(),
346-
&shared.backend,
347-
);
336+
.invalidate_all(shared.code_buf(), &shared.backend);
348337
per_cpu.jump_cache.invalidate();
349338
next_tb_hint = None;
350339
}
@@ -498,8 +487,7 @@ where
498487
if let Some(idx) = per_cpu.jump_cache.lookup(pc) {
499488
let tb = shared.tb_store.get(idx);
500489
if !tb.invalid.load(Ordering::Acquire)
501-
&& tb.gen.load(Ordering::Acquire)
502-
== shared.tb_store.global_gen()
490+
&& tb.gen.load(Ordering::Acquire) == shared.tb_store.global_gen()
503491
&& tb.pc == pc
504492
&& tb.flags == flags
505493
&& (cur_phys == u64::MAX || tb.phys_pc == cur_phys)

core/src/cpu.rs

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -158,11 +158,7 @@ pub trait GuestCpu {
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/// decide whether to replace a cached multi-insn TB
159159
/// with a 1-insn ephemeral TB for breakpoint
160160
/// precision.
161-
fn gdb_breakpoint_in_tb(
162-
&self,
163-
_tb_pc: u64,
164-
_tb_size: u64,
165-
) -> bool {
161+
fn gdb_breakpoint_in_tb(&self, _tb_pc: u64, _tb_size: u64) -> bool {
166162
false
167163
}
168164
}

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