Registers fixup.

Author: gjz010

descriptor/generator.rs

@@ -258,6 +258,18 @@ use bit_field::BitField;
 #[derive(Copy, Clone, Debug)]
 pub struct {}{{\n    bits: usize,\n}}
 impl {}{{
+    #[inline]
+    pub fn bits(&self) -> usize{{
+        return self.bits;
+    }}
+    #[inline]
+    pub fn from_bits(x: usize) -> Self{{
+        return {}{{bits: x}};
+    }}
+    #[inline]
+    pub unsafe fn write(&self){{
+        _write(self.bits);
+    }}
 {}
 }}
 read_csr_as!({}, {}, __read_{});
@@ -273,6 +285,7 @@ clear!({}, __clear_{});
     , self.description, 
     self.name, 
     self.name, 
+    self.name,
     trait_impls, 
     self.name, self.id, self.canonical_name(),
     self.id, self.canonical_name(),

descriptor/hstatus.txt

@@ -7,6 +7,7 @@ vtvm,20,20,number,TVM for VM.
 vgein,17,12,number,Virtual Guest External Interrupt Number.
 hu,9,9,number,Hypervisor User mode.
 spvp,8,8,number,Supervisor Previous Virtual Privilege.
+spv,7,7,number,Supervisor Previous Virtualization mode.
 gva,6,6,number,Guest Virtual Address.
 vsbe,5,5,number,VS access endianness.
 end

descriptor/vsstatus.txt

@@ -1,4 +1,4 @@
-Vstatus
+Vsstatus
 512
 sd,63,60,number,
 uxl,33,32,UxlValues,Uxl32=1;Uxl64;Uxl128,Effective User XLEN.

src/register/hypervisorx64/hcounteren.rs

@@ -7,6 +7,18 @@ pub struct Hcounteren {
     bits: usize,
 }
 impl Hcounteren {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hcounteren { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     ///
     #[inline]
     pub fn cy(&self) -> bool {

src/register/hypervisorx64/hedeleg.rs

@@ -7,6 +7,18 @@ pub struct Hedeleg {
     bits: usize,
 }
 impl Hedeleg {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hedeleg { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     /// Instruction address misaligned
     #[inline]
     pub fn ex0(&self) -> bool {

src/register/hypervisorx64/hgatp.rs

@@ -7,6 +7,18 @@ pub struct Hgatp {
     bits: usize,
 }
 impl Hgatp {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hgatp { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     /// Guest address translation mode.
     #[inline]
     pub fn mode(&self) -> HgatpValues {

src/register/hypervisorx64/hideleg.rs

@@ -7,6 +7,18 @@ pub struct Hideleg {
     bits: usize,
 }
 impl Hideleg {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hideleg { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     /// Software Interrupt
     #[inline]
     pub fn sip(&self) -> bool {

src/register/hypervisorx64/hie.rs

@@ -7,6 +7,18 @@ pub struct Hie {
     bits: usize,
 }
 impl Hie {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hie { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     /// Software Interrupt
     #[inline]
     pub fn vssie(&self) -> bool {

src/register/hypervisorx64/hip.rs

@@ -7,6 +7,18 @@ pub struct Hip {
     bits: usize,
 }
 impl Hip {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hip { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     /// Software Interrupt
     #[inline]
     pub fn vssip(&self) -> bool {

src/register/hypervisorx64/hstatus.rs

@@ -7,6 +7,18 @@ pub struct Hstatus {
     bits: usize,
 }
 impl Hstatus {
+    #[inline]
+    pub fn bits(&self) -> usize {
+        return self.bits;
+    }
+    #[inline]
+    pub fn from_bits(x: usize) -> Self {
+        return Hstatus { bits: x };
+    }
+    #[inline]
+    pub unsafe fn write(&self) {
+        _write(self.bits);
+    }
     /// Effective XLEN for VM.
     #[inline]
     pub fn vsxl(&self) -> VsxlValues {
@@ -70,6 +82,15 @@ impl Hstatus {
     pub fn set_spvp(&mut self, val: bool) {
         self.bits.set_bit(8, val);
     }
+    /// Supervisor Previous Virtualization mode.
+    #[inline]
+    pub fn spv(&self) -> bool {
+        self.bits.get_bit(7)
+    }
+    #[inline]
+    pub fn set_spv(&mut self, val: bool) {
+        self.bits.set_bit(7, val);
+    }
     /// Guest Virtual Address.
     #[inline]
     pub fn gva(&self) -> bool {
@@ -109,6 +130,9 @@ set_clear_csr!(
 set_clear_csr!(
     ///Supervisor Previous Virtual Privilege.
     , set_spvp, clear_spvp, 1 << 8);
+set_clear_csr!(
+    ///Supervisor Previous Virtualization mode.
+    , set_spv, clear_spv, 1 << 7);
 set_clear_csr!(
     ///Guest Virtual Address.
     , set_gva, clear_gva, 1 << 6);