[SYCL] Pass SPIR-V extensions explicitly to jit compiler (intel#17359)

Resolves intel#16597

This patch also adds few other missing options

---------

Signed-off-by: Sidorov, Dmitry <[email protected]>

Author: MrSidims

clang/lib/Driver/ToolChains/Clang.cpp

@@ -10769,6 +10769,8 @@ static void getNonTripleBasedSPIRVTransOpts(Compilation &C,
 // to user supplied options.
 // NOTE: Any changes made here should be reflected in the similarly named
 // function in clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp.
+// NOTE2: JIT related changes made here should be reflected in 'translatorOpts'
+// from sycl-jit/jit-compiler/lib/translation/SPIRVLLVMTranslation.cpp.
 static void getTripleBasedSPIRVTransOpts(Compilation &C,
                                          const llvm::opt::ArgList &TCArgs,
                                          llvm::Triple Triple,

sycl-jit/jit-compiler/lib/translation/SPIRVLLVMTranslation.cpp

@@ -23,29 +23,78 @@ using namespace jit_compiler::translation;
 using namespace llvm;
 
 SPIRV::TranslatorOpts &SPIRVLLVMTranslator::translatorOpts() {
-  static auto Opts = []() -> SPIRV::TranslatorOpts {
+  // Keep this in sync with clang/lib/Driver/ToolChains/Clang.cpp
+  // TODO: consider introducing a config file that both clang and jit-compiler
+  // could use during options setting.
+  std::vector<SPIRV::ExtensionID> AllowedExtensions{
+      SPIRV::ExtensionID::SPV_EXT_shader_atomic_float_add,
+      SPIRV::ExtensionID::SPV_EXT_shader_atomic_float_min_max,
+      SPIRV::ExtensionID::SPV_KHR_no_integer_wrap_decoration,
+      SPIRV::ExtensionID::SPV_KHR_float_controls,
+      SPIRV::ExtensionID::SPV_KHR_expect_assume,
+      SPIRV::ExtensionID::SPV_KHR_linkonce_odr,
+      SPIRV::ExtensionID::SPV_INTEL_subgroups,
+      SPIRV::ExtensionID::SPV_INTEL_media_block_io,
+      SPIRV::ExtensionID::SPV_INTEL_device_side_avc_motion_estimation,
+      SPIRV::ExtensionID::SPV_INTEL_fpga_loop_controls,
+      SPIRV::ExtensionID::SPV_INTEL_unstructured_loop_controls,
+      SPIRV::ExtensionID::SPV_INTEL_fpga_reg,
+      SPIRV::ExtensionID::SPV_INTEL_blocking_pipes,
+      SPIRV::ExtensionID::SPV_INTEL_function_pointers,
+      SPIRV::ExtensionID::SPV_INTEL_kernel_attributes,
+      SPIRV::ExtensionID::SPV_INTEL_io_pipes,
+      SPIRV::ExtensionID::SPV_INTEL_inline_assembly,
+      SPIRV::ExtensionID::SPV_INTEL_arbitrary_precision_integers,
+      SPIRV::ExtensionID::SPV_INTEL_float_controls2,
+      SPIRV::ExtensionID::SPV_INTEL_vector_compute,
+      SPIRV::ExtensionID::SPV_INTEL_fast_composite,
+      SPIRV::ExtensionID::SPV_INTEL_arbitrary_precision_fixed_point,
+      SPIRV::ExtensionID::SPV_INTEL_arbitrary_precision_floating_point,
+      SPIRV::ExtensionID::SPV_INTEL_variable_length_array,
+      SPIRV::ExtensionID::SPV_INTEL_fp_fast_math_mode,
+      SPIRV::ExtensionID::SPV_INTEL_long_composites,
+      SPIRV::ExtensionID::SPV_INTEL_arithmetic_fence,
+      SPIRV::ExtensionID::SPV_INTEL_global_variable_decorations,
+      SPIRV::ExtensionID::SPV_INTEL_cache_controls,
+      SPIRV::ExtensionID::SPV_INTEL_fpga_buffer_location,
+      SPIRV::ExtensionID::SPV_INTEL_fpga_argument_interfaces,
+      SPIRV::ExtensionID::SPV_INTEL_fpga_invocation_pipelining_attributes,
+      SPIRV::ExtensionID::SPV_INTEL_fpga_latency_control,
+      SPIRV::ExtensionID::SPV_KHR_shader_clock,
+      SPIRV::ExtensionID::SPV_INTEL_bindless_images,
+      SPIRV::ExtensionID::SPV_INTEL_task_sequence,
+      SPIRV::ExtensionID::SPV_INTEL_bfloat16_conversion,
+      SPIRV::ExtensionID::SPV_INTEL_joint_matrix,
+      SPIRV::ExtensionID::SPV_INTEL_hw_thread_queries,
+      SPIRV::ExtensionID::SPV_KHR_uniform_group_instructions,
+      SPIRV::ExtensionID::SPV_INTEL_masked_gather_scatter,
+      SPIRV::ExtensionID::SPV_INTEL_tensor_float32_conversion,
+      SPIRV::ExtensionID::SPV_INTEL_optnone,
+      SPIRV::ExtensionID::SPV_KHR_non_semantic_info,
+      SPIRV::ExtensionID::SPV_KHR_cooperative_matrix,
+      SPIRV::ExtensionID::SPV_EXT_shader_atomic_float16_add,
+      SPIRV::ExtensionID::SPV_INTEL_fp_max_error};
+
+  static auto Opts = [&]() -> SPIRV::TranslatorOpts {
     // Options for translation between SPIR-V and LLVM IR.
-    // Set SPIRV-V 1.4 as the maximum version number for now.
+    // Set SPIRV-V 1.5 as the maximum version number for now.
     // Note that some parts of the code depend on the available builtins, e.g.,
     // passes/kernel-fusion/Builtins.cpp, so updating the SPIR-V version should
     // involve revisiting that code.
-    SPIRV::TranslatorOpts TransOpt{SPIRV::VersionNumber::SPIRV_1_4};
+    SPIRV::TranslatorOpts TransOpt{SPIRV::VersionNumber::SPIRV_1_5};
     // Enable attachment of kernel arg names as metadata.
     TransOpt.enableGenArgNameMD();
     // Enable mem2reg.
     TransOpt.setMemToRegEnabled(true);
-    // Enable all extensions.
-    // TODO: Specifically enable only the
-    // extensions listed in the KernelInfo.
-    // FIXME: Because there's no size provided,
-    // there's currently no obvious way to iterate the
-    // array of extensions in KernelInfo.
-    TransOpt.enableAllExtensions();
-    // TODO: Remove this workaround.
-    TransOpt.setAllowedToUseExtension(
-        SPIRV::ExtensionID::SPV_KHR_untyped_pointers, false);
+    for (auto &Ext : AllowedExtensions)
+      TransOpt.setAllowedToUseExtension(Ext, true);
     TransOpt.setDesiredBIsRepresentation(
         SPIRV::BIsRepresentation::SPIRVFriendlyIR);
+    TransOpt.setDebugInfoEIS(
+        SPIRV::DebugInfoEIS::NonSemantic_Shader_DebugInfo_200);
+    const llvm::SmallVector<llvm::StringRef, 4> AllowedIntrinsics = {
+        "llvm.genx."};
+    TransOpt.setSPIRVAllowUnknownIntrinsics(AllowedIntrinsics);
     // TODO: We need to take care of specialization constants, either by
     // instantiating them by the user-supplied value from the SYCL runtime or by
     // making sure they are correctly represented in the output of the fusion