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1 parent 98ecfaa commit cebd80eCopy full SHA for cebd80e
ports/espressif/boards/lilygo_twatch_s3/board.c
@@ -16,7 +16,7 @@
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#define DELAY 0x80
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-// display init sequence according to LilyGO example app
+// Display init sequence according to LILYGO factory firmware
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uint8_t display_init_sequence[] = {
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// sw reset
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0x01, 0 | DELAY, 150,
@@ -58,8 +58,8 @@ void board_init(void) {
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bus,
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spi,
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&pin_GPIO38, // DC
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- &pin_GPIO12, // CS
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- NULL, // RST
+ &pin_GPIO12, // CS
+ NULL, // RST
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40000000, // baudrate
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0, // polarity
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0 // phase
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