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arch: arm: Add initial support for Cortex-M85 Core
Add initial support for the Cortex-M85 Core which is an implementation of the Armv8.1-M mainline architecture. The support is based on the Cortex-M55 support that already exists in Zephyr. Signed-off-by: Duy Nguyen <[email protected]>
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11 files changed

+61
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‎arch/arm/core/cortex_m/Kconfig‎

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@@ -73,6 +73,17 @@ config CPU_CORTEX_M55
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help
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This option signifies the use of a Cortex-M55 CPU
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config CPU_CORTEX_M85
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bool
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select CPU_CORTEX_M
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select ARMV8_1_M_MAINLINE
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select ARMV8_M_SE if CPU_HAS_TEE
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select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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help
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This option signifies the use of a Cortex-M85 CPU
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config CPU_CORTEX_M7
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bool
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select CPU_CORTEX_M

‎arch/arm/core/mpu/arm_mpu.c‎

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@@ -54,6 +54,7 @@ static uint8_t static_regions_num;
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#elif defined(CONFIG_CPU_CORTEX_M23) || \
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defined(CONFIG_CPU_CORTEX_M33) || \
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defined(CONFIG_CPU_CORTEX_M55) || \
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defined(CONFIG_CPU_CORTEX_M85) || \
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defined(CONFIG_AARCH32_ARMV8_R)
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#include "arm_mpu_v8_internal.h"
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#else

‎arch/arm/core/mpu/arm_mpu_v8_internal.h‎

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@@ -31,7 +31,7 @@ struct dynamic_region_info {
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*/
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static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
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#if defined(CONFIG_CPU_CORTEX_M23) || defined(CONFIG_CPU_CORTEX_M33) || \
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defined(CONFIG_CPU_CORTEX_M55)
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defined(CONFIG_CPU_CORTEX_M55) || defined(CONFIG_CPU_CORTEX_M85)
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static inline void mpu_set_mair0(uint32_t mair0)
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{
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MPU->MAIR0 = mair0;

‎cmake/gcc-m-cpu.cmake‎

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@@ -34,6 +34,16 @@ if("${ARCH}" STREQUAL "arm")
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else()
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set(GCC_M_CPU cortex-m55+nodsp)
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endif()
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elseif(CONFIG_CPU_CORTEX_M85)
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if (CONFIG_ARMV8_1_M_MVEF)
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set(GCC_M_CPU cortex-m85)
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elseif(CONFIG_ARMV8_1_M_MVEI)
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set(GCC_M_CPU cortex-m85+nomve.fp)
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elseif(CONFIG_ARMV8_M_DSP)
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set(GCC_M_CPU cortex-m85+nomve)
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else()
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set(GCC_M_CPU cortex-m85+nodsp)
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endif()
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elseif(CONFIG_CPU_CORTEX_R4)
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if(CONFIG_FPU AND CONFIG_CPU_HAS_VFP)
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set(GCC_M_CPU cortex-r4f)

‎cmake/gcc-m-fpu.cmake‎

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@@ -39,6 +39,10 @@ if("${ARCH}" STREQUAL "arm")
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set(FPU_FOR_cortex-m55+nomve.fp auto)
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set(FPU_FOR_cortex-m55+nomve auto)
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set(FPU_FOR_cortex-m55+nodsp auto)
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set(FPU_FOR_cortex-m85 auto)
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set(FPU_FOR_cortex-m85+nomve.fp auto)
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set(FPU_FOR_cortex-m85+nomve auto)
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set(FPU_FOR_cortex-m85+nodsp auto)
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set(GCC_M_FPU ${FPU_FOR_${GCC_M_CPU}})
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endif()

‎dts/bindings/cpu/arm,cortex-m85.yaml‎

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# Copyright (c) 2024 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: ARM Cortex-M85 CPU
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compatible: "arm,cortex-m85"
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include: arm,cortex-m.yaml

‎dts/bindings/cpu/arm,cortex-m85f.yaml‎

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# Copyright (c) 2024 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: ARM Cortex-M85F CPU
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compatible: "arm,cortex-m85f"
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include: arm,cortex-m.yaml

‎include/zephyr/arch/arm/cortex_m/memory_map.h‎

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@@ -67,7 +67,8 @@
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#define _PPB_INT_RSVD_2 0xE000F000
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#elif defined(CONFIG_CPU_CORTEX_M23) || \
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defined(CONFIG_CPU_CORTEX_M33) || \
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defined(CONFIG_CPU_CORTEX_M55)
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defined(CONFIG_CPU_CORTEX_M55) || \
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defined(CONFIG_CPU_CORTEX_M85)
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#define _PPB_INT_RSVD_0 0xE0000000
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#define _PPB_INT_SCS 0xE000E000
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#define _PPB_INT_SCB 0xE000ED00
@@ -88,7 +89,8 @@
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#define _PPB_EXT_PPB 0xE0042000
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#define _PPB_EXT_ROM_TABLE 0xE00FF000
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#define _PPB_EXT_END_ADDR 0xE00FFFFF
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#elif defined(CONFIG_CPU_CORTEX_M33) || defined(CONFIG_CPU_CORTEX_M55)
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#elif defined(CONFIG_CPU_CORTEX_M33) || defined(CONFIG_CPU_CORTEX_M55) \
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|| defined(CONFIG_CPU_CORTEX_M85)
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#undef _PPB_EXT_BASE_ADDR
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#define _PPB_EXT_BASE_ADDR 0xE0044000
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#define _PPB_EXT_ROM_TABLE 0xE00FF000

‎include/zephyr/arch/arm/mpu/arm_mpu.h‎

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@@ -15,6 +15,7 @@
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#elif defined(CONFIG_CPU_CORTEX_M23) || \
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defined(CONFIG_CPU_CORTEX_M33) || \
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defined(CONFIG_CPU_CORTEX_M55) || \
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defined(CONFIG_CPU_CORTEX_M85) || \
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defined(CONFIG_AARCH32_ARMV8_R)
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#include <zephyr/arch/arm/mpu/arm_mpu_v8.h>
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#else

‎modules/cmsis/cmsis_core_m_defaults.h‎

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@@ -64,6 +64,8 @@ typedef enum {
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#define __CM33_REV 0
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#elif defined(CONFIG_CPU_CORTEX_M55)
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#define __CM55_REV 0
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#elif defined(CONFIG_CPU_CORTEX_M85)
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#define __CM85_REV 0
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#else
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#error "Unknown Cortex-M device"
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#endif
@@ -135,6 +137,8 @@ typedef enum {
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#include <core_cm33.h>
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#elif defined(CONFIG_CPU_CORTEX_M55)
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#include <core_cm55.h>
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#elif defined(CONFIG_CPU_CORTEX_M85)
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#include <core_cm85.h>
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#else
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#error "Unknown Cortex-M device"
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#endif

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