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[mlir][llvm] Saturation arithmetic intrinsics.
Add the saturation arithmetic intrinsics to the LLVM dialect. Reviewed By: Dinistro Differential Revision: https://reviews.llvm.org/D150676 (cherry picked from commit c04cf58dfc5430f0c82c8ef42c3a8cb43f84020b)
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‎mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td‎

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@@ -276,6 +276,17 @@ def LLVM_CoroResumeOp : LLVM_IntrOp<"coro.resume", [], [], [], 0> {
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let assemblyFormat = "$handle attr-dict";
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}
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//
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// Saturation Arithmetic Intrinsics.
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//
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def LLVM_SAddSat : LLVM_BinarySameArgsIntrOpI<"sadd.sat">;
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def LLVM_UAddSat : LLVM_BinarySameArgsIntrOpI<"uadd.sat">;
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def LLVM_SSubSat : LLVM_BinarySameArgsIntrOpI<"ssub.sat">;
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def LLVM_USubSat : LLVM_BinarySameArgsIntrOpI<"usub.sat">;
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def LLVM_SSHLSat : LLVM_BinarySameArgsIntrOpI<"sshl.sat">;
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def LLVM_USHLSat : LLVM_BinarySameArgsIntrOpI<"ushl.sat">;
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//
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// Debug function intrinsics.
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//

‎mlir/test/Target/LLVMIR/Import/intrinsic.ll‎

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@@ -447,6 +447,60 @@ define void @umul_with_overflow_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @sadd_sat_test
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define void @sadd_sat_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK: llvm.intr.sadd.sat(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
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%5 = call i32 @llvm.sadd.sat.i32(i32 %0, i32 %1)
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; CHECK: llvm.intr.sadd.sat(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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%6 = call <8 x i32> @llvm.sadd.sat.v8i32(<8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @uadd_sat_test
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define void @uadd_sat_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK: llvm.intr.uadd.sat(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
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%5 = call i32 @llvm.uadd.sat.i32(i32 %0, i32 %1)
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; CHECK: llvm.intr.uadd.sat(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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%6 = call <8 x i32> @llvm.uadd.sat.v8i32(<8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @ssub_sat_test
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define void @ssub_sat_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK: llvm.intr.ssub.sat(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
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%5 = call i32 @llvm.ssub.sat.i32(i32 %0, i32 %1)
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; CHECK: llvm.intr.ssub.sat(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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%6 = call <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @usub_sat_test
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define void @usub_sat_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK: llvm.intr.usub.sat(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
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%5 = call i32 @llvm.usub.sat.i32(i32 %0, i32 %1)
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; CHECK: llvm.intr.usub.sat(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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%6 = call <8 x i32> @llvm.usub.sat.v8i32(<8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @sshl_sat_test
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define void @sshl_sat_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK: llvm.intr.sshl.sat(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
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%5 = call i32 @llvm.sshl.sat.i32(i32 %0, i32 %1)
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; CHECK: llvm.intr.sshl.sat(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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%6 = call <8 x i32> @llvm.sshl.sat.v8i32(<8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @ushl_sat_test
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define void @ushl_sat_test(i32 %0, i32 %1, <8 x i32> %2, <8 x i32> %3) {
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; CHECK: llvm.intr.ushl.sat(%{{.*}}, %{{.*}}) : (i32, i32) -> i32
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%5 = call i32 @llvm.ushl.sat.i32(i32 %0, i32 %1)
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; CHECK: llvm.intr.ushl.sat(%{{.*}}, %{{.*}}) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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%6 = call <8 x i32> @llvm.ushl.sat.v8i32(<8 x i32> %2, <8 x i32> %3)
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ret void
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}
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; CHECK-LABEL: llvm.func @va_intrinsics_test
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define void @va_intrinsics_test(ptr %0, ptr %1) {
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; CHECK: llvm.intr.vastart %{{.*}}
@@ -771,6 +825,18 @@ declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32)
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declare { <8 x i32>, <8 x i1> } @llvm.smul.with.overflow.v8i32(<8 x i32>, <8 x i32>)
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declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32)
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declare { <8 x i32>, <8 x i1> } @llvm.umul.with.overflow.v8i32(<8 x i32>, <8 x i32>)
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declare i32 @llvm.sadd.sat.i32(i32, i32)
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declare <8 x i32> @llvm.sadd.sat.v8i32(<8 x i32>, <8 x i32>)
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declare i32 @llvm.uadd.sat.i32(i32, i32)
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declare <8 x i32> @llvm.uadd.sat.v8i32(<8 x i32>, <8 x i32>)
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declare i32 @llvm.ssub.sat.i32(i32, i32)
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declare <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32>, <8 x i32>)
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declare i32 @llvm.usub.sat.i32(i32, i32)
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declare <8 x i32> @llvm.usub.sat.v8i32(<8 x i32>, <8 x i32>)
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declare i32 @llvm.sshl.sat.i32(i32, i32)
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declare <8 x i32> @llvm.sshl.sat.v8i32(<8 x i32>, <8 x i32>)
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declare i32 @llvm.ushl.sat.i32(i32, i32)
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declare <8 x i32> @llvm.ushl.sat.v8i32(<8 x i32>, <8 x i32>)
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declare token @llvm.coro.id(i32, ptr readnone, ptr nocapture readonly, ptr)
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declare ptr @llvm.coro.begin(token, ptr writeonly)
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declare i64 @llvm.coro.size.i64()

‎mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir‎

Lines changed: 66 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -466,6 +466,60 @@ llvm.func @umul_with_overflow_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>,
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llvm.return
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}
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// CHECK-LABEL: @sadd_sat_test
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llvm.func @sadd_sat_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
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// CHECK: call i32 @llvm.sadd.sat.i32
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"llvm.intr.sadd.sat"(%arg0, %arg1) : (i32, i32) -> i32
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// CHECK: call <8 x i32> @llvm.sadd.sat.v8i32
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"llvm.intr.sadd.sat"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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llvm.return
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}
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// CHECK-LABEL: @uadd_sat_test
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llvm.func @uadd_sat_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
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// CHECK: call i32 @llvm.uadd.sat.i32
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"llvm.intr.uadd.sat"(%arg0, %arg1) : (i32, i32) -> i32
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// CHECK: call <8 x i32> @llvm.uadd.sat.v8i32
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"llvm.intr.uadd.sat"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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llvm.return
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}
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// CHECK-LABEL: @ssub_sat_test
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llvm.func @ssub_sat_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
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// CHECK: call i32 @llvm.ssub.sat.i32
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"llvm.intr.ssub.sat"(%arg0, %arg1) : (i32, i32) -> i32
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// CHECK: call <8 x i32> @llvm.ssub.sat.v8i32
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"llvm.intr.ssub.sat"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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llvm.return
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}
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// CHECK-LABEL: @usub_sat_test
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llvm.func @usub_sat_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
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// CHECK: call i32 @llvm.usub.sat.i32
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"llvm.intr.usub.sat"(%arg0, %arg1) : (i32, i32) -> i32
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// CHECK: call <8 x i32> @llvm.usub.sat.v8i32
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"llvm.intr.usub.sat"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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llvm.return
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}
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// CHECK-LABEL: @sshl_sat_test
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llvm.func @sshl_sat_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
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// CHECK: call i32 @llvm.sshl.sat.i32
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"llvm.intr.sshl.sat"(%arg0, %arg1) : (i32, i32) -> i32
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// CHECK: call <8 x i32> @llvm.sshl.sat.v8i32
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"llvm.intr.sshl.sat"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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llvm.return
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}
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// CHECK-LABEL: @ushl_sat_test
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llvm.func @ushl_sat_test(%arg0: i32, %arg1: i32, %arg2: vector<8xi32>, %arg3: vector<8xi32>) {
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// CHECK: call i32 @llvm.ushl.sat.i32
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"llvm.intr.ushl.sat"(%arg0, %arg1) : (i32, i32) -> i32
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// CHECK: call <8 x i32> @llvm.ushl.sat.v8i32
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"llvm.intr.ushl.sat"(%arg2, %arg3) : (vector<8xi32>, vector<8xi32>) -> vector<8xi32>
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llvm.return
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}
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// CHECK-LABEL: @coro_id
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llvm.func @coro_id(%arg0: i32, %arg1: !llvm.ptr<i8>) {
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// CHECK: call token @llvm.coro.id
@@ -811,6 +865,18 @@ llvm.func @lifetime(%p: !llvm.ptr) {
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// CHECK-DAG: declare { <8 x i32>, <8 x i1> } @llvm.usub.with.overflow.v8i32(<8 x i32>, <8 x i32>) #0
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// CHECK-DAG: declare { i32, i1 } @llvm.umul.with.overflow.i32(i32, i32)
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// CHECK-DAG: declare { <8 x i32>, <8 x i1> } @llvm.umul.with.overflow.v8i32(<8 x i32>, <8 x i32>) #0
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// CHECK-DAG: declare i32 @llvm.sadd.sat.i32(i32, i32)
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// CHECK-DAG: declare <8 x i32> @llvm.sadd.sat.v8i32(<8 x i32>, <8 x i32>)
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// CHECK-DAG: declare i32 @llvm.uadd.sat.i32(i32, i32)
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// CHECK-DAG: declare <8 x i32> @llvm.uadd.sat.v8i32(<8 x i32>, <8 x i32>)
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// CHECK-DAG: declare i32 @llvm.ssub.sat.i32(i32, i32)
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// CHECK-DAG: declare <8 x i32> @llvm.ssub.sat.v8i32(<8 x i32>, <8 x i32>)
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// CHECK-DAG: declare i32 @llvm.usub.sat.i32(i32, i32)
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// CHECK-DAG: declare <8 x i32> @llvm.usub.sat.v8i32(<8 x i32>, <8 x i32>)
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// CHECK-DAG: declare i32 @llvm.sshl.sat.i32(i32, i32)
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// CHECK-DAG: declare <8 x i32> @llvm.sshl.sat.v8i32(<8 x i32>, <8 x i32>)
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// CHECK-DAG: declare i32 @llvm.ushl.sat.i32(i32, i32)
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// CHECK-DAG: declare <8 x i32> @llvm.ushl.sat.v8i32(<8 x i32>, <8 x i32>)
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// CHECK-DAG: declare token @llvm.coro.id(i32, ptr readnone, ptr nocapture readonly, ptr)
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// CHECK-DAG: declare ptr @llvm.coro.begin(token, ptr writeonly)
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// CHECK-DAG: declare i64 @llvm.coro.size.i64()

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