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StartInit.s
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7522 lines (7488 loc) · 223 KB
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INCLUDE 'ROMTools/Include.s'
INCLUDE 'HardwareEqu.s'
INCLUDE 'ConstEqu.s'
INCLUDE 'Orphan.s'
INCLUDE 'ROMTools/TrapMacros.s'
INCLUDE 'ROMTools/Hardware/Portable.s'
INCLUDE 'ROMTools/CommonConst.s'
INCLUDE 'ROMTools/Globals.s'
IFND PortableAbs
PortableAbs EQU 0
ENDIF
IF PortableAbs
opt o10- ; Prevent optimization from add/sub to lea
opt o4- ; Prevent optimization from move.l to moveq
opt ol-
opt og-
opt o11-
ENDIF
; Add PC to JMP when matching original ROM
macro jpp
IF PortableAbs
jmp (\1,PC)
ELSE
jmp \1
ENDIF
endm
; Add PC to JSR when matching original ROM
macro jsp
IF PortableAbs
jsr (\1,PC)
ELSE
jsr \1
ENDIF
endm
macro BigLea
lea (\1-*).l,\2
lea (*-6,PC,\2.l),\2
endm
macro BSR6
lea .\@,A6
jmp (\1,PC)
.\@:
endm
macro BigJsr
lea (\1-*).l,\2
jsr (*-6,PC,\2.l)
endm
; This delay is used for SCC access during tests
; It is defined as a macro here to quickly redefine it for faster processors if needed.
macro _SCCDelay
move.w (SP),(SP)
endm
org BaseOfROM
ROMChecksum dc.l $96CA3846
StartPC dc.l ResetEntry
ROMVersion dc.b $3
dc.b $7A
StBoot jpp StartBoot
BadDisk jpp StartBoot
dc.w 0
PatchFlags dc.b 0
dc.b 0
dc.l ForeignOS-BaseOfROM
RomRsrc dc.l RomRsrcHead-BaseOfROM
Eject jpp GoofyDoEject
DispOff dc.l DispTable-BaseOfROM
Critical jpp CritErr
ResetEntry jpp StartBoot
RomLoc dc.b 0
dc.b 0
myROMSums dc.l $961F12
dc.l $AA82FA
dc.l 0
dc.l 0
dc.l $40000
ForeignOS dc.l InitDispatcher-BaseOfROM
dc.l EMT1010_TrapDispatch-BaseOfROM
dc.l Unimplemented-BaseOfROM
dc.l EMT1010_TrapDispatch-BaseOfROM
dc.l 0
StartBoot:
move #1<<Supervisor|1<<IPL2|1<<IPL1|1<<IPL0,SR ; Disable processor interrupts
lea BaseOfROM,A0
move.l A0,D0
bne.b .L1
move.l #BaseOfROM,D0
jmp (.L1,PC,D0.l)
.L1:
tst.w Clock16M ;
move.w #RAMconfigInit,RAMconfigBase
cmpi.l #sleepConst,WarmStart ; Check if we're resuming from sleep
bne.b .L2
move.l #wmStConst,WarmStart ;
jpp WakeUp ; Perform wake from sleep tasks
; Not returning from sleep, start up normally
.L2:
jpp StartTest1
StartInit1:
bsr.w InitVIA
bsr.w InitSCC
bsr.w InitIWM
bsr.w InitSCSI
bsr.w WhichCPU ; Get CPU type in low word of D7
bsr.w WhichBoard ; Get logic board type in high word of D7
cmpi.l #wmStConst,WarmStart ; Is this a cold start
beq.b .L1 ; Skip the RAM test if it's a warm start
movea.l A5,A1
movea.l SP,A0
jsp RamTest
movea.l SP,A1
suba.l A0,A0 ; Test from the beginning of RAM
movea.l A5,SP
jsp RamTest
movea.l A1,SP
.L1:
move.l WarmStart,-(SP) ; Save WarmStart value
lea SysCom,A0 ; A0 = pointer to start of system globals
lea HeapStart,A1 ; A1 = pointer to end of system globals
bsr.w FillWithOnes ; Fill system globals with ones
move.l (SP)+,WarmStart ; Restore WarmStart value
move.b D7,CPUFlag ; Save type of CPU we have
swap D7
move.b D7,WhichBox
move.l A6,MemTop ; Save the top of available memory
BSR6 SysErrInit
bsr.w SetUpTimeK ; Initialize TimeDBRA and TimeSCCDB
bsr.w VIATimerEnables
clr.b MMUType
movem.l DiagROM1,D0/A0
cmpi.l #TROMCode,D0
bne.b .L3
lea BootRetry,A1
jmp (A0)
.L3:
bsr.w InitHiMemGlobals ; Set up high memory
; BootRetry
BootRetry:
move #$2700,SR ; Disable interrupts
movea.l VIA,A1
move.b #$4,(VIA_IER-VIA_Base,A1)
bsr.w InitGlobalVars ; Initialize a bunch of global variables
BigJsr InitIntHandler,A0
bsr.w InitDispatcher
bsr.w GetPRAM
bsr.w InitMemMgr
bsr.w SetUpSysAppZone
bsr.w InitSwitcherTable
bsr.w InitPMgrVars
bsr.w InitRsrcMgr
BigJsr NMInit,A0
BigJsr InitTimeMgr,A0
bsr.w InitADBvars
bsr.w InitShutdownMgr
bsr.w InitDTQueue
move #$2000,SR
bsr.w InitVidGlobals
bsr.w CompBootStack
movea.l A0,SP ; Set the stack pointer there
suba.w #BootStackSize,A0 ; Give ourselves some stack space
_SetApplLimit ; Don't let the system heap crash our stack
lea DrvQHdr.w,A1
jsp InitQueue
BigJsr InitSCSIMgr,A0
bsr.w InitIOMgr
BigJsr InitADB,A0
bsr.w InitCrsrMgr
moveq #$70,D0
_NewPtrSysClear
move.l A0,ExpandMem
movea.l A0,A4
move.w #$106,(A0)+
move.l #$70,(A0)
.P5 lea InitGestalt-.P5,A0
jsr (.P5,PC,A0.l)
movea.l SysZone,a0
movea.l (A0),A0
adda.w #$4000,A0
_SetApplBase
movea.l SysZone,A0
move.l A0,TheZone
move.l A0,ApplZone
move.l (A0),HeapEnd
lea ($400,SP),A6
lea ($190,SP),A5
lea (-$10,SP),SP
lea ($C,SP),A0
move.l A0,($8,SP)
move.l A0,($4,SP)
moveq #$5B,D0
move.b D0,(A0)
move.w #1,($2,SP)
move.w #powerCntl,(SP)
movea.l SP,A0
_PMgrOp
lea ($10,SP),SP
bsr.w DrawBeepScreen
move.l #wmStConst,WarmStart
bra.w BootMe
; JmpTblInit
;
; Sets up RAM based jump tables from ROM routine offset tables
;
; Inputs: A0 Pointer to table of routine word offsets (A0-relative)
; A1 Pointer to destination jump table in RAM
; D1 Number of vectors to install - 1
; Outputs: A0 Pointer to next entry in offset table
; A1 Pointer to next jump table entry in RAM
JmpTblInit:
move.l A0,D0
.JmpTbl2:
moveq #0,D2
move.w (A0)+,D2
add.l D0,D2
move.l D2,(A1)+
dbf D1,.JmpTbl2
rts
; FillWithOnes
;
; Fills a longword aligned memory range with all 1's
;
; Inputs: A0 Pointer to starting RAM location
; A1 Pointer to ending RAM location
; Outputs: A0
; A1
FillWithOnes:
move.l A1,D0
sub.l A0,D0
lsr.l #2,D0
moveq #-$1,D1
.FillLoop:
move.l D1,(A0)+
subq.l #1,D0
bne.b .FillLoop
rts
CompBootStack:
move.l BufPtr,D0 ; Get top of usable memory
lsr.l #1,D0 ; Divide by two
movea.l D0,A0
suba.w #$400,A0
rts
SetUpSysAppZone:
lea SysHeap,A0
_InitZone
move.l TheZone,SysZone
move.l SysZone,RAMBase
movea.l SysZone,A0
move.l A0,ApplZone
movea.l (bkLim,A0),A0
move.l A0,HeapEnd
bsr.b CompBootStack
cmpa.l SP,A0
bls .L3
movea.l SP,A0
.L3:
suba.w #BootStackSize,A0
_SetApplLimit
rts
SysHeap:
dc.l HeapStart ; Start address
dc.l HeapStart+SysZoneSize ; Size
dc.w 2*dfltMasters ; Number of master pointers
dc.l 0 ; No growzone proc
DrawBeepScreen:
pea (-$4,A5)
_InitGraf
pea (-$200,A6)
_OpenPort
movea.l (A5),A2
pea (-$6C,A2)
_SetCursor
_PenNormal
tst.b NTSC
bne.b .L1
lea (-$74,A2),A0
move.l A0,-(SP)
pea (-$18,A2)
_FillRect
rts
.L1:
moveq #0,D0
movea.l PowerMgrVars,A0
tst.b (NTSCcopy,A0)
bpl.b .L2
moveq #-1,D0
.L2:
cmpi.b #2,NTSC
bne.b .L4
movea.l #Video_Base,A0
move.w #8000,D1
subq.w #1,D1
.L3:
move.l D0,(A0)+
dbf D1,.L3
.L4:
lea (-$74,A2),A0
move.l A0,-(SP)
lea ($9FA),A1
move.l A1,-(SP)
move.l A1,-(SP)
move.l (A0)+,(A1)+
move.l (A0),(A1)
move.l #$FFFDFFFD,-(SP)
_InsetRect
move.l #$30003,-(SP) ; Make pen 3 pixels wide
_PenSize
move.l #$160016,-(SP) ; Rounding factor ($00100010 + 2 * $00030003)
_FrameRoundRect
_PenNormal
move.l #$100010,-(SP)
pea (-$18,A2)
_FillRoundRect
rts
InitShutdownMgr:
clr.w -(SP)
_Shutdown
rts
InitPMgrVars:
move.l #158,D0
_NewPtrSysClear
move.l A0,PowerMgrVars
movea.l A0,A2
lea (SleepQHdr,A2),A1
jsp InitQueue
st (TOdirtyFlag,A2)
moveq #1,D0
move.l D0,(LastAct,A2)
move.l D0,(LastHd,A2)
move.b #CPUSpeed16MHz,(SaveSpeedo,A2)
lea BatInt,A1
move.l A1,(vBatInt,A2)
lea EnvInt,A1
move.l A1,(vEnvInt,A2)
lea (SwVBLTask,A2),A0
move.w #1,($4,A0)
move.w #SndWFreq,($A,A0)
lea SndWatch,A1
move.l A1,($6,A0)
_VInstall
lea (BatVBLTask,A2),A0
move.w #1,($4,A0)
move.w #BatFreq,($A,A0)
lea BatWatch,A1
move.l A1,($6,A0)
_VInstall
lea PMgrInt,A0
move.l A0,Lvl1DT+$10
lea (-$10,SP),SP
lea ($C,SP),A0
move.l A0,($8,SP)
move.l A0,($4,SP)
clr.l (A0)
clr.w ($2,SP)
move.w #pMgrADBoff,(SP)
movea.l SP,A0
_PMgrOp
move.l #$100070,D0
_ReadXPRam
move.b (VidMode-PmgrPramBase,A0),(NTSCcopy,A2)
move.b (NTSCcopy,A2),NTSC
bclr.b #7,NTSC
tst.w (A0)
beq.b .L1
tst.w (PmgrStatusFlags-PmgrPramBase,A0)
bne.b .L2
.L1:
move.b #DfltSlpTime,(SlpTimeOut-PmgrPramBase,A0)
move.b #DfltHDTime,(HDTimeOut-PmgrPramBase,A0)
move.w #$4E3E,(PmgrStatusFlags-PmgrPramBase,A0)
move.l #$4*$10000+PmgrPramBase,D0
_WriteXPRam
.L2:
move.b (SlpTimeOut-PmgrPramBase,A0),(SleepTime,A2)
move.b (HDTimeOut-PmgrPramBase,A0),(HDTime,A2)
move.w (PmgrStatusFlags-PmgrPramBase,A0),(LowWarn,A2)
lea ($10,SP),SP
movea.l (VIA),A1
move.b #%10010000,(VIA_IFR-VIA_Base,A1)
move.b #%10010000,(VIA_IER-VIA_Base,A1)
rts
InitADBvars:
move.l #FBDBSize,D0 ; Get local data area length
_NewPtrSysClear ; Allocate space on heap and clear
move.l A0,ADBBase ; Save pointer to ADBBase
.P1 lea (ADBProc-.P1).l,A0 ; Get the ADBProc
lea (.P1,PC,A0.l),A0
move.l A0,JADBProc ; Install it into JADBProc vector
.P2 lea (FDBShiftInt_VIA2-.P2).l,A0
lea (.P2,PC,A0.l),A0
move.l A0,(Lvl1DT+8)
rts
InitHiMemGlobals:
move.w #-$1,PWMValue ; Set current PWM speed invalid
movea.l A5,A0
suba.w #$2FF,A0
move.l A0,PWMBuf1
move.l A0,PWMBuf2
subq.w #1,A0
move.l A0,SoundBase
move.l A0,BufPtr ; Save pointer to top of usable RAM
rts
IF PortableAbs
org $900460
ENDIF
InitGlobalVars:
lea BaseOfROM,A0 ; Point to ROMBase
move.l A0,ROMBase
moveq #-1,D0
move.l D0,SMGlobals
move.l #Sound_Base,ASCBase
move.b #$7F,ROM85
move.w #$C500,HWCfgFlags
move.l #$10001,OneOne ; Setup magic constants
moveq #-1,D0
move.l D0,MinusOne ; Setup MinusOne
bsr.w InitSCCGlobals
bsr.w InitIWMGlobals
bsr.w InitVIAGlobals
bsr.w InitSCSIGlobals
clr.l DSAlertTab
move.w MinusOne,FSFCBLen ; Mark that FS needs (re)initialization
BigLea FSIODNETbl,A0 ; Point to the offset table
lea JFetch,A1 ; Point to first jump table entry
moveq #2,D1 ; There are 3 vectors
bsr.w JmpTblInit
clr.b DskVerify ; No disk verify
clr.b LoadTrap ; No trap before launch
clr.b MmInOK ; Inital memory manager checks
clr.w SysEvtMask ; Don't allow any events to be posted
clr.l JKybdTask ; No keyboard task yet
clr.l StkLowPt ; Set stack low at this time (turn off check during VBL)
lea VBLQueue,A1
jsp InitQueue ; Initialize VBL queue header
clr.l Ticks ; Clear system tick count
move.b #$80,MBState ; Set current mouse button state to up
clr.l MBTicks ; Clear timestamp for mouse button
clr.l SysFontFam ; Clear SysFontFam and SysFontSize
clr.l WidthTabHandle
clr.w TESysJust
clr.b WordRedraw
jsp InitCrsrVars
clr.w SysVersion
bclr.b #0,AlarmState
BigLea NMGNEFilter,A0
move.l A0,GNEFilter
clr.l IAZNotify ; No InitApplZone notify proc
move.w #$FF7F,FlEvtMask ; Init for disable of DIP flushes
rts
IF PortableAbs
org $900524
ENDIF
SwitchGoodies:
dc.l $4000400
dc.l $E001000
dc.l $B800026
dc.l $BAE0052
dc.l $3760002
dc.l $3840002
dc.l $3520004
dc.l $2F80002
dc.l $3980004
dc.l $D540004
dc.l $0
dc.l $0
dc.l $4
dc.l $0
SwitchLen EQU *-SwitchGoodies
WDCBSWOS:
dc.w $28
PMPSWOS:
dc.w $2E
InitSwitcherTable:
moveq #SwitchLen,D0 ; Allocate a switcher table
_NewPtrSysClear ; in the system heap
movea.l A0,A1 ; Make it the destination
lea SwitchGoodies,A0 ; Load table
moveq #SwitchLen,D0 ; Copy it - needs to be updated
_BlockMove ; with WDCBSwitch, PMSPSwitch later
move.l A1,SwitcherTPtr ; Set the pointer up for Switcher
rts
GetPRAM:
_InitUtil
moveq #0,D1
move.b SPKbd,D1
moveq #$F,D0
and.w D1,D0
bne.b .L1
moveq #$48,D0
.L1:
add.w D0,D0
move.w D0,KeyRepThresh
lsr.w #4,D1
bne.b .L2
move.w #$1FFF,D1
.L2:
lsl.w #2,D1
move.w D1,KeyThresh
move.b SPClikCaret,D1
moveq #$F,D0
and.b D1,D0
lsl.b #2,D0
move.l D0,CaretTime
lsr.b #2,D1
moveq #$3C,D0
and.b D1,D0
move.l D0,DoubleTime
rts
IF PortableAbs
org $9005B2
ENDIF
; WhichCPU
;
; Determines which CPU is installed.
;
; 0 = 68000
; 1 = 68010
; 2 = 68020
; 3 = 68030
WhichCPU:
machine mc68040
lea IllegalInstructionVector,A1
move.l (A1),-(SP) ; Save the vector
lea .ILException,A0
move.l A0,(A1) ; Replace it with our exception handler
movea.l SP,A0
clr.w -(SP)
moveq #cpu68020,D7
move.w #$2909,D0
movec D0,CACR
movec CACR,D0
bclr.l #8,D0 ; Clear Enable Data Cache bit
beq.b .L2
movec D0,CACR
moveq #cpu68030,D7
bra.b .L2
; If we're here then an exception occurred and the CPU is a 68000 or 68010
.ILException:
moveq #cpu68010,D7
cmpi.w #$10,($6,SP)
beq.b .L2
moveq #cpu68000,D7
.L2:
movea.l A0,SP
move.l (SP)+,(A1) ; Restore the exception handler
rts
machine mc68000
; WhichBoard
;
; Determine the logic board (BoxFlag) and put it in the high word of D7.
WhichBoard:
swap D7 ; Move the CPU type to the high word
clr.w D7 ; Clear the low word
move.b #boxSE,D7 ; Default to Macintosh SE
lea .L1,A0 ; Get our ROM location
move.l A0,D1
btst.l #23,D1 ; Is the ROM in 0x900000 or higher?
beq.b .L1 ; No, skip
move.b #boxPortable,D7 ; Set BoxFlag to 4 (Portable)
.L1:
swap D7 ; Move BoxFlag into high word
rts
IF PortableAbs
org $90060C
ENDIF
SetUpTimeK:
move SR,-(SP)
move.l Lev1AutoVector,-(SP)
movea.l #VIA_Base,A1
bclr.b #$5,(VIA_ACR-VIA_Base,A1)
move.b #$FF,(VIA_T2_H-VIA_Base,A1)
move.b #$A0,(VIA_IER-VIA_Base,A1)
andi #$F8FF,SR ; Enable interrupts
move.l SP,D1
lea (VIAIntForTimeDBRA),A0
move.l A0,Lev1AutoVector
moveq #-1,D0
bra.b .L3
.L1:
move.b #$F,(VIA_T2_L-VIA_Base,A1)
move.b #$3,(VIA_T2_H-VIA_Base,A1)
.L2:
dbf D0,.L2
bra.b VIAIntForTimeDBRA
.L3:
bra.b .L1
VIAIntForTimeDBRA:
tst.b (VIA_T2_L-VIA_Base,A1)
not.w D0
move.w D0,TimeDBRA
movea.l D1,SP
andi #$F8FF,SR ; Enable interrupts
lea VIAIntForTimeSCCDB,A0
move.l A0,(Lev1AutoVector)
movea.l #SCCRBase,A0
moveq #-1,D0
bra.b .L3
.L1:
move.b #$F,(VIA_T2_L-VIA_Base,A1)
move.b #$3,(VIA_T2_H-VIA_Base,A1)
.L2:
btst.b #0,(SCCR_bCtl-SCCRBase,A0)
dbf D0,.L2
bra.b VIAIntForTimeSCCDB
.L3:
bra.b .L1
VIAIntForTimeSCCDB:
tst.b (VIA_T2_L-VIA_Base,A1)
not.w D0
move.w D0,TimeSCCDB
movea.l D1,SP
andi #$F8FF,SR
lea VIAIntForTimeSCSIDB,A0
move.l A0,Lev1AutoVector
movea.l #SCSI_Base,A0
moveq #-1,D0
bra.b .L3
.L1:
move.b #$F,(VIA_T2_L-VIA_Base,A1)
move.b #$3,(VIA_T2_H-VIA_Base,A1)
.L2:
btst.b #0,(sCSRread-SCSI_Base,A0)
dbf D0,.L2
bra.b VIAIntForTimeSCSIDB
.L3:
bra.b .L1
VIAIntForTimeSCSIDB:
tst.b (VIA_T2_L-VIA_Base,A1)
not.w D0
move.w D0,TimeSCSIDB
movea.l D1,SP
andi #$F8FF,SR
lea VIAIntForADBDelay,A0
move.l A0,Lev1AutoVector
lea (VIA_IER-VIA_Base,A1),A0
moveq #-1,D0
bra.b .L3
.L1:
move.b #$F,(VIA_T2_L-VIA_Base,A1)
move.b #$3,(VIA_T2_H-VIA_Base,A1)
.L2:
btst.b #0,(A0)
dbf D0,.L2
bra.b VIAIntForADBDelay
.L3:
bra.b .L1
VIAIntForADBDelay:
tst.b (VIA_T2_L-VIA_Base,A1)
not.w D0
move.w D0,ADBDelay
movea.l D1,SP
move.b #$20,(VIA_IER-VIA_Base,A1)
move.l (SP)+,Lev1AutoVector
move (SP)+,SR
rts
InitSCSIGlobals:
move.l #SCSIrd,SCSIBase
move.l #SCSI_Base+$200,SCSIDMA
move.l #SCSI_Base+$200,SCSIHsk
rts
InitSCSI:
lea SCSIwr,A0
clr.b (sICRwrite-SCSIwr,A0)
clr.b (sMRwrite-SCSIwr,A0)
clr.b (sTCRwrite-SCSIwr,A0)
clr.b (sCSRwrite-SCSIwr,A0)
rts
InitIWMGlobals:
move.l #DBase,IWM
rts
InitIWM:
movea.l #DBase,A0
moveq #IWMInitMode,D0
.L1:
move.b #$BE,(ph3L-DBase,A0)
move.b #$F8,(ph3L-DBase,A0)
tst.b (q7L-DBase,A0)
tst.b (mtrOff-DBase,A0)
tst.b (q6H-DBase,A0)
move.b (q7L-DBase,A0),D2
btst.l #5,D2
bne.b .L1
and.b D0,D2
cmp.b D0,D2
beq.b .Exit
move.b D0,(q7H-DBase,A0)
tst.b (q7L-DBase,A0)
bra.b .L1
.Exit:
tst.b (q6L-DBase,A0)
rts
InitVIAGlobals:
move.l #VIA_Base,VIA
rts
InitVIA:
movea.l #VIA_Base,A0
clr.b (VIA_ORA-VIA_Base,A0)
move.b #$FF,(VIA_DDR_A-VIA_Base,A0)
move.b #$DF,(VIA_BufB-VIA_Base,A0)
move.b #$B9,(VIA_DDR_B-VIA_Base,A0)
move.b #$7F,(VIA_IER-VIA_Base,A0)
rts
VIATimerEnables:
movea.l #VIA_Base,A0
move.b #$22,(VIA_PCR-VIA_Base,A0)
move.b #$83,(VIA_IER-VIA_Base,A0)
rts
InitSCCGlobals:
move.l #SCCWBase,SCCWr
move.l #SCCRBase,SCCRd
clr.l PollProc
rts
Gary:
dc.b $9,$40,$4,$4C
dc.b $2,$0,$3,$C0
dc.b $F,$0,$0,$10
dc.b $0,$10,$1,$0
dc.b $9,$80,$4,$4C
dc.b $3,$C0,$F,$0
dc.b $0,$10,$0,$10
dc.b $1,$0
InitSCC:
movea.l #SCCWBase,A0
movea.l #SCCRBase,A1
lea Gary,A2
moveq #$10,D1
bsr.b WriteSCC
addq.l #2,A0
addq.l #2,A1
moveq #$E,D1
bsr.b WriteSCC
rts
WriteSCC:
move.b (A1),D2
bra.b .L2
.L1:
move.l (SP),(SP)
move.l (SP),(SP)
move.b (A2)+,(A0)
.L2:
dbf D1,.L1
rts
InitVidGlobals:
move.l #Video_Base,ScrnBase
move.l #hcVideoSize,ScreenBytes
move.w #VideoWidth,RowBits
move.w #VideoHeight,ColLines
cmpi.b #NTSCmode,NTSC
bne.b .L1
move.w #NTSCMaxX,RowBits
addq.l #NTSCOffset,ScrnBase
.L1:
move.w #80,ScreenRow
move.w #60,VertRRate
move.l #$480048,ScrVRes
rts
InitCrsrVars:
lea GrafBegin,A0
lea GrafEnd,A1
.ZeroLoop:
clr.w (A0)+
cmpa.l A1,A0
bcs.b .ZeroLoop
rts
InitCrsrMgr:
move.l #$F000F,D0
lea MTemp,A0
move.l D0,(A0)+
move.l D0,(A0)+
move.l D0,(A0)+
clr.l (A0)+
move.w ColLines,(A0)+
move.w RowBits,(A0)
moveq #TotalSize,D0 ; Allocate space for mouse tracking pointer
_NewPtrSys ; Put in system heap
move.l A0,MickeyBytes ; Save globals pointer
move.w #1,(ADBCount,A0)
move.w #8,(MaxCnt,A0)
clr.w (Error,A0)
lea MouseBytes,A1
adda.w #GSize,A0
move.l (A1)+,(A0)+
move.l (A1),(A0)
lea GrafEnd,A1
BigLea CrsrDevHandleVBL,A0
move.l A0,-(A1)
move.w #6,-(A1)
BigLea InitCrTable,A0
lea JHideCursor,A1
moveq #8-1,D1
bsr.w JmpTblInit
moveq #-1,D0
move.w D0,CrsrNew
move.l D0,MouseMask
rts
MouseBytes dc.b 4,10,15,255,255,83,77,72
InitIOMgr:
moveq #$40,D0
move.w D0,UnitNtryCnt
asl.l #2,D0
_NewPtrSysClear
move.l A0,UTableBase
suba.w #$32,SP
movea.l SP,A0
clr.b ($1B,A0)
lea DiskName,A1
move.l A1,($12,A0)
_Open
lea EDiskName,A1
move.l A1,($12,A0)
_Open
lea SndName,A1
move.l A1,($12,A0)
_Open
adda.w #$32,SP
subq.w #4,SP
move.l #'SERD',-(SP)
clr.w -(SP)
move.w #$FFFF,(ROMMapInsert)
_GetResource
move.l (SP)+,D0
beq.b .Exit
movea.l D0,A0
movea.l (A0),A0
jsr (A0)
.Exit:
rts
DiskName:
dc.b SndName-*-1
dc.b '.Sony'
SndName:
dc.b EDiskName-*-2
dc.b '.Sound '
EDiskName:
dc.b InitMemMgr-*-2
dc.b '.EDisk',$0
InitMemMgr:
move.l #$FFFFFF,Lo3Bytes
move.l #$400,MinStack
move.l #$2000,DefltStack
clr.w MMDefFlags
rts
InitRsrcMgr:
st SysMap
clr.l TopMapHndl
clr.w -(SP)
_InitResources
addq.w #2,SP
rts
InitDTQueue:
lea DtskQHdr_Flags,A1
jsp InitQueue
lea $90528A,A1
move.l A1,$D9C
rts
GoofyDoEject:
.P1: lea (DoEject-.P1),A0
jmp (.P1,PC,A0.l)
TMVectors:
dc.l $2000 ; Initial stack pointer
dc.l StartTest1 ; Initial program counter
dc.l .BusError ; Bus error veector
dc.l .AdrError ; Address error vector
dc.l .IllError ; Illegal instruction error vector
dc.l .ZerError
dc.l .ChkError
dc.l .TrapV
dc.l .PrivError
dc.l .Trace
dc.l .LineA
dc.l .LineF
dc.l .Unassigned
dc.l .CPProtocol
dc.l .FormatX
dc.l .SpurInterrupt
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .SpurInterrupt
dc.l .IntLevel1
dc.l .IntLevel2
dc.l .IntLevel3
dc.l .IntLevel4
dc.l .IntLevel5
dc.l .IntLevel6
dc.l .IntLevel7
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .TrapInst
dc.l .FPCP1
dc.l .FPCP2
dc.l .FPCP3
dc.l .FPCP4
dc.l .FPCP5
dc.l .FPCP6
dc.l .FPCP7
dc.l .Unassigned
dc.l .PMMUConfig
dc.l .PMMUIllegal
dc.l .PMMUAccess
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
dc.l .Unassigned
.BusError:
btst.l #beok,D7 ; Are bus errors expected?
beq.b .BusError2
movea.l A5,SP
jmp (A6)
.BusError2:
ori.w #BECode,D7
bra.w ExceptionHandler
.AdrError:
ori.w #ADCode,D7
bra.w ExceptionHandler
.IllError:
ori.w #ILCode,D7
bra.w ExceptionHandler
.ZerError:
ori.w #ZDCode,D7
bra.w ExceptionHandler
.ChkError:
ori.w #CICode,D7
bra.w ExceptionHandler
.TrapV:
ori.w #TPCode,D7
bra.w ExceptionHandler
.PrivError:
ori.w #PVCode,D7
bra.w ExceptionHandler
.Trace:
ori.w #TECode,D7
bra.w ExceptionHandler
.LineA:
ori.w #ATCode,D7
bra.w ExceptionHandler
.LineF:
ori.w #FTCode,D7
bra.w ExceptionHandler
.Unassigned:
ori.w #UNCode,D7
bra.w ExceptionHandler
.CPProtocol:
ori.w #CPCode,D7
bra.w ExceptionHandler
.FormatX:
ori.w #FMCode,D7
bra.w ExceptionHandler
.SpurInterrupt:
ori.w #SICode,D7
bra.w ExceptionHandler
.TrapInst:
ori.w #TNCode,D7
bra.b ExceptionHandler
.IntLevel1:
ori.w #L1Code,D7
bra.b ExceptionHandler
.IntLevel2:
ori.w #L2Code,D7
bra.b ExceptionHandler
.IntLevel3:
ori.w #L3Code,D7
bra.b ExceptionHandler
.IntLevel4:
ori.w #L4Code,D7
bset.l #nmi,D7
bra.b ExceptionHandler
.IntLevel5:
ori.w #L5Code,D7
bset.l #nmi,D7
bra.b ExceptionHandler
.IntLevel6:
ori.w #L6Code,D7