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[SelectionDAG] Inverted args for PTRADD on getMemBasePlusOffset()
By allowing getMemBasePlusOffset() to know whether its use for regular ADDs does not take pointer first and offset second, the generation of PTRADD on enabled targets can be done correctly, with the arguments inverted. This modification is to avoid changing the generation of some ADDs, thus requiring the rewrite of several tests for several architectures.
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4 files changed

+15
-32
lines changed

4 files changed

+15
-32
lines changed

llvm/include/llvm/CodeGen/SelectionDAG.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1072,7 +1072,8 @@ class SelectionDAG {
10721072
SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL,
10731073
const SDNodeFlags Flags = SDNodeFlags());
10741074
SDValue getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL,
1075-
const SDNodeFlags Flags = SDNodeFlags());
1075+
const SDNodeFlags Flags = SDNodeFlags(),
1076+
const bool Inverted = false);
10761077

10771078
/// Create an add instruction with appropriate flags when used for
10781079
/// addressing some offset of an object. i.e. if a load is split into multiple

llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Lines changed: 3 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -3970,14 +3970,7 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
39703970
else
39713971
Index = DAG.getNode(ISD::MUL, dl, Index.getValueType(), Index,
39723972
DAG.getConstant(EntrySize, dl, Index.getValueType()));
3973-
SDValue Addr;
3974-
if (!DAG.getTarget().shouldPreservePtrArith(
3975-
DAG.getMachineFunction().getFunction())) {
3976-
Addr = DAG.getNode(ISD::ADD, dl, Index.getValueType(), Index, Table);
3977-
} else {
3978-
// PTRADD always takes the pointer first, so the operands are commuted
3979-
Addr = DAG.getNode(ISD::PTRADD, dl, Index.getValueType(), Table, Index);
3980-
}
3973+
SDValue Addr = DAG.getMemBasePlusOffset(Index, Table, dl, true);
39813974

39823975
EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8);
39833976
SDValue LD = DAG.getExtLoad(
@@ -3988,15 +3981,8 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
39883981
// For PIC, the sequence is:
39893982
// BRIND(load(Jumptable + index) + RelocBase)
39903983
// RelocBase can be JumpTable, GOT or some sort of global base.
3991-
if (!DAG.getTarget().shouldPreservePtrArith(
3992-
DAG.getMachineFunction().getFunction())) {
3993-
Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr,
3994-
TLI.getPICJumpTableRelocBase(Table, DAG));
3995-
} else {
3996-
// PTRADD always takes the pointer first, so the operands are commuted
3997-
Addr = DAG.getNode(ISD::PTRADD, dl, PTy,
3998-
TLI.getPICJumpTableRelocBase(Table, DAG), Addr);
3999-
}
3984+
Addr = DAG.getMemBasePlusOffset(
3985+
Addr, TLI.getPICJumpTableRelocBase(Table, DAG), dl);
40003986
}
40013987

40023988
Tmp1 = TLI.expandIndirectJTBranch(dl, LD.getValue(1), Addr, JTI, DAG);

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8062,14 +8062,19 @@ SDValue SelectionDAG::getMemBasePlusOffset(SDValue Base, TypeSize Offset,
80628062

80638063
SDValue SelectionDAG::getMemBasePlusOffset(SDValue Ptr, SDValue Offset,
80648064
const SDLoc &DL,
8065-
const SDNodeFlags Flags) {
8065+
const SDNodeFlags Flags,
8066+
const bool Inverted) {
80668067
assert(Offset.getValueType().isInteger());
80678068
EVT BasePtrVT = Ptr.getValueType();
80688069
if (!this->getTarget().shouldPreservePtrArith(
80698070
this->getMachineFunction().getFunction())) {
80708071
return getNode(ISD::ADD, DL, BasePtrVT, Ptr, Offset, Flags);
80718072
} else {
8072-
return getNode(ISD::PTRADD, DL, BasePtrVT, Ptr, Offset, Flags);
8073+
if (Inverted) {
8074+
return getNode(ISD::PTRADD, DL, BasePtrVT, Offset, Ptr, Flags);
8075+
} else {
8076+
return getNode(ISD::PTRADD, DL, BasePtrVT, Ptr, Offset, Flags);
8077+
}
80738078
}
80748079
}
80758080

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4499,18 +4499,9 @@ void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
44994499
// Round the size of the allocation up to the stack alignment size
45004500
// by add SA-1 to the size. This doesn't overflow because we're computing
45014501
// an address inside an alloca.
4502-
SDNodeFlags Flags;
4503-
Flags.setNoUnsignedWrap(true);
4504-
if (DAG.getTarget().shouldPreservePtrArith(
4505-
DAG.getMachineFunction().getFunction())) {
4506-
AllocSize = DAG.getNode(ISD::PTRADD, dl, AllocSize.getValueType(),
4507-
DAG.getConstant(StackAlignMask, dl, IntPtr),
4508-
AllocSize, SDNodeFlags::NoUnsignedWrap);
4509-
} else {
4510-
AllocSize = DAG.getNode(ISD::ADD, dl, AllocSize.getValueType(), AllocSize,
4511-
DAG.getConstant(StackAlignMask, dl, IntPtr),
4512-
SDNodeFlags::NoUnsignedWrap);
4513-
}
4502+
AllocSize = DAG.getMemBasePlusOffset(
4503+
AllocSize, DAG.getConstant(StackAlignMask, dl, IntPtr), dl,
4504+
SDNodeFlags::NoUnsignedWrap, true);
45144505

45154506
// Mask out the low bits for alignment purposes.
45164507
AllocSize = DAG.getNode(ISD::AND, dl, AllocSize.getValueType(), AllocSize,

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