Skip to content

Commit c70948f

Browse files
committed
Remove getMemBasePlusOffset inversion logic after llvm#125279
1 parent 82d0550 commit c70948f

File tree

3 files changed

+4
-10
lines changed

3 files changed

+4
-10
lines changed

llvm/include/llvm/CodeGen/SelectionDAG.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1073,8 +1073,7 @@ class SelectionDAG {
10731073
SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL,
10741074
const SDNodeFlags Flags = SDNodeFlags());
10751075
SDValue getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL,
1076-
const SDNodeFlags Flags = SDNodeFlags(),
1077-
const bool Inverted = false);
1076+
const SDNodeFlags Flags = SDNodeFlags());
10781077

10791078
/// Create an add instruction with appropriate flags when used for
10801079
/// addressing some offset of an object. i.e. if a load is split into multiple

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -8069,19 +8069,14 @@ SDValue SelectionDAG::getMemBasePlusOffset(SDValue Base, TypeSize Offset,
80698069

80708070
SDValue SelectionDAG::getMemBasePlusOffset(SDValue Ptr, SDValue Offset,
80718071
const SDLoc &DL,
8072-
const SDNodeFlags Flags,
8073-
const bool Inverted) {
8072+
const SDNodeFlags Flags) {
80748073
assert(Offset.getValueType().isInteger());
80758074
EVT BasePtrVT = Ptr.getValueType();
80768075
if (!this->getTarget().shouldPreservePtrArith(
80778076
this->getMachineFunction().getFunction())) {
80788077
return getNode(ISD::ADD, DL, BasePtrVT, Ptr, Offset, Flags);
80798078
} else {
8080-
if (Inverted) {
8081-
return getNode(ISD::PTRADD, DL, BasePtrVT, Offset, Ptr, Flags);
8082-
} else {
8083-
return getNode(ISD::PTRADD, DL, BasePtrVT, Ptr, Offset, Flags);
8084-
}
8079+
return getNode(ISD::PTRADD, DL, BasePtrVT, Ptr, Offset, Flags);
80858080
}
80868081
}
80878082

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4501,7 +4501,7 @@ void SelectionDAGBuilder::visitAlloca(const AllocaInst &I) {
45014501
// an address inside an alloca.
45024502
AllocSize = DAG.getMemBasePlusOffset(
45034503
AllocSize, DAG.getConstant(StackAlignMask, dl, IntPtr), dl,
4504-
SDNodeFlags::NoUnsignedWrap, true);
4504+
SDNodeFlags::NoUnsignedWrap);
45054505

45064506
// Mask out the low bits for alignment purposes.
45074507
AllocSize = DAG.getNode(ISD::AND, dl, AllocSize.getValueType(), AllocSize,

0 commit comments

Comments
 (0)