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Merge pull request #1233 from riscv-collab/attr-qemu
Set qemu cpu option from ELF attribute
2 parents 57699f1 + 5da0026 commit ac4e8dd

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3 files changed

+61
-6
lines changed

3 files changed

+61
-6
lines changed

Makefile.in

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -176,9 +176,8 @@ report-gdb: report-gdb-@default_target@
176176

177177
.PHONY: build-sim
178178
ifeq ($(SIM),qemu)
179-
QEMU_CPU=$(shell $(srcdir)/scripts/march-to-cpu-opt $(WITH_ARCH))
180-
SIM_PATH:=$(srcdir)/scripts/wrapper/qemu
181-
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)" QEMU_CPU="$(QEMU_CPU)"
179+
SIM_PATH:=$(srcdir)/scripts/wrapper/qemu:$(srcdir)/scripts
180+
SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)"
182181
SIM_STAMP:= stamps/build-qemu
183182
else
184183
ifeq ($(SIM),spike)

scripts/march-to-cpu-opt

Lines changed: 57 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,9 @@
33
import argparse
44
import sys
55
import unittest
6+
import elftools.elf.elffile
7+
import elftools.elf.enums
8+
import elftools.elf.sections
69

710
EXT_OPTS = {
811
"zba": "zba=true",
@@ -26,6 +29,8 @@ def parse_opt(argv):
2629
parser = argparse.ArgumentParser()
2730
parser.add_argument('-march', '--with-arch', type=str, dest='march')
2831
parser.add_argument('-selftest', action='store_true')
32+
parser.add_argument('--get-riscv-tag', type=str)
33+
parser.add_argument('--get-elf-class', type=str)
2934
opt = parser.parse_args()
3035
return opt
3136

@@ -156,12 +161,63 @@ class TestArchStringParse(unittest.TestCase):
156161
def selftest():
157162
unittest.main(argv=sys.argv[1:])
158163

164+
def open_elf(path):
165+
try:
166+
elffile = elftools.elf.elffile.ELFFile(open(path, 'rb'))
167+
except elftools.common.exceptions.ELFError:
168+
raise Exception("%s is not ELF file!" % path)
169+
return elffile
170+
171+
def read_elf_class(path):
172+
elffile = open_elf(path)
173+
return elffile.elfclass
174+
175+
def read_arch_attr (path):
176+
elffile = open_elf(path)
177+
178+
attr_sec = elffile.get_section_by_name(".riscv.attributes")
179+
if attr_sec:
180+
# pyelftools has support RISC-V attribute but not contain in any
181+
# release yet, so use ARMAttributesSection for now...
182+
xattr_section = \
183+
elftools.elf.sections.ARMAttributesSection (
184+
attr_sec.header,
185+
attr_sec.name,
186+
elffile)
187+
for subsec in xattr_section.subsections:
188+
for subsubsec in subsec.subsubsections:
189+
for attr in subsubsec.iter_attributes():
190+
val = attr.value
191+
if (not isinstance(val, str)):
192+
continue
193+
pos32 = val.find("rv32")
194+
pos64 = val.find("rv64")
195+
# MAGIC WORKAROUND
196+
# Some version of pyelftools has issue for parsing
197+
# Tag number = 5, it will wrongly parse it become
198+
# Tag number = 4 + 0x10 + 0x5
199+
if (pos32 == 2) or (pos64 == 2):
200+
val = val[2:]
201+
# End of MAGIC WORKAROUND
202+
203+
if (pos32 != -1 or pos64 != -1):
204+
return val
205+
raise Exception("Not found ELF attribute in %s?" % path)
206+
159207
def main(argv):
160208
opt = parse_opt(argv)
161209
if opt.selftest:
162210
selftest()
163211
return 0
164-
cpu_opt = conver_arch_to_qemu_cpu_opt(opt.march)
212+
if (opt.get_elf_class):
213+
elf_class = read_elf_class (opt.get_elf_class)
214+
print (elf_class)
215+
return
216+
if (opt.get_riscv_tag):
217+
march = read_arch_attr (opt.get_riscv_tag)
218+
else:
219+
march = opt.march
220+
cpu_opt = conver_arch_to_qemu_cpu_opt(march)
165221
print (cpu_opt)
166222

167223
if __name__ == '__main__':

scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,6 @@ do
1010
shift
1111
done
1212

13-
xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')"
13+
xlen="$(march-to-cpu-opt --get-elf-class $1)"
1414

15-
QEMU_CPU=${QEMU_CPU} qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@"
15+
QEMU_CPU="$(march-to-cpu-opt --get-riscv-tag $1)" qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@"

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