@@ -1319,7 +1319,7 @@ static int read_memory(struct target *target, target_addr_t address,
13191319 }
13201320
13211321 uint32_t value = riscv_program_read_ram (& program , r_data );
1322- LOG_DEBUG ("M[0x%" TARGET_PRIxADDR "] reads 0x%08lx " , address , ( long ) value );
1322+ LOG_DEBUG ("M[0x%" TARGET_PRIxADDR "] reads 0x%08x " , address , value );
13231323 switch (size ) {
13241324 case 1 :
13251325 buffer [0 ] = value ;
@@ -1466,7 +1466,7 @@ static int read_memory(struct target *target, target_addr_t address,
14661466 return ERROR_FAIL ;
14671467 }
14681468
1469- LOG_DEBUG ("M[0x%08lx] reads 0x%08lx " , (long )t_addr , ( long ) value );
1469+ LOG_DEBUG ("M[0x%08lx] reads 0x%08x " , (long )t_addr , value );
14701470 }
14711471 riscv_batch_free (batch );
14721472 }
@@ -1555,7 +1555,7 @@ static int write_memory(struct target *target, target_addr_t address,
15551555 }
15561556 riscv_program_write_ram (& program , r_data , value );
15571557
1558- LOG_DEBUG ("M[0x%08lx] writes 0x%08lx " , (long )address , ( long ) value );
1558+ LOG_DEBUG ("M[0x%08lx] writes 0x%08x " , (long )address , value );
15591559
15601560 if (riscv_program_exec (& program , target ) != ERROR_OK ) {
15611561 uint32_t acs = dmi_read (target , DMI_ABSTRACTCS );
@@ -1615,7 +1615,7 @@ static int write_memory(struct target *target, target_addr_t address,
16151615 return ERROR_FAIL ;
16161616 }
16171617
1618- LOG_DEBUG ("M[0x%08lx] writes 0x%08lx " , (long )t_addr , ( long ) value );
1618+ LOG_DEBUG ("M[0x%08lx] writes 0x%08x " , (long )t_addr , value );
16191619
16201620 riscv_batch_add_dmi_write (
16211621 batch ,
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