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* flash/nor: Add support for TI CC26xx/CC13xx flash Added cc26xx flash driver to support the TI CC26xx and CC13xx microcontrollers. Driver is capable of determining which MCU is connected and configures itself accordingly. Added config files for four specific variants: CC26x0, CC13x0, CC26x2, and CC13x2. Note that the flash loader code is based on the sources used to support flash in Code Composer Studio and Uniflash from TI. Removed cc26xx.cfg file made obsolete by this patch. Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862 Signed-off-by: Edward Fewell <[email protected]> Reviewed-on: http://openocd.zylin.com/4358 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Fredrik Hederstierna <[email protected]> * flash/nor/nrf5: remove is_erased setting and autoerase before write Cached flash erase state in sectors[].is_erased is not reliable as running target can change the flash. Autoerase was issued before flash write on condition is_erased != 1 Remove autoerase completely as it is a quite non-standard feature. Change-Id: I19bef459e6afdc4c5fcaa2ccd194cf05be8a42b6 Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4400 Tested-by: jenkins * src/flash/tms470: remove testing of sectors[].is_erased state The erase check routine checked sectors only if is_erased != 1 Check sector unconditionally. While on it fix clang static analyzer warnings. Change-Id: I9988615fd8530c55a9b0c54b1900f89b550345e9 Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4401 Tested-by: jenkins * tcl/target/stm32f7x: configure faster system clock in reset-init STM32F7xx devices need faster clock for flash programming over JTAG transport. Using reset default 16 MHz clock resulted in lot of DAP WAITs and substantial decrease of flashing performance. Adapted to the restructured dap support (see 2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f). Change-Id: Ida6915331dd924c9c0d08822fd94c04ad408cdc5 Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4464 Tested-by: jenkins Reviewed-by: Christopher Head <[email protected]> * flash/nor/psoc5lp: fix compile issue on GCC 8.1.0 Issue already identified by Alex https://sourceforge.net/u/alexbour/ in ticket #191 https://sourceforge.net/p/openocd/tickets/191/ src/flash/nor/psoc5lp.c:237:2: error: ‘strncpy’ output truncated before terminating nul copying 2 bytes from a string of the same length [-Werror=stringop-truncation] Fix it by assigning the value to the array elements. Change-Id: I22468e5700efa64ea48ae8cdec930c48b4a7d8fb Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4563 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/arm: Add PLD command to ARM disassembler. Updates the ARM disassembler to handle PLD (PreLoad Data) commands. Previously handled by printing a TODO message. There are three forms of the command: literal, register, and immediate. Simply decode based off of the A1 encoding for the instructions in the ARM ARM. Also fixes mask to handle PLDW commands. Change-Id: I63bf97f16af254e838462c7cfac80f6c4681c556 Signed-off-by: James Marshall <[email protected]> Reviewed-on: http://openocd.zylin.com/4348 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <[email protected]> * mips_m4k.c: Fix build with --disable-target64 Replace PRIx64 with TARGET_PRIxADDR to avoid build problems when --disable-target64 is used during configure. Change-Id: I054a27a491e86c42c9386a0488194320b808ba96 Signed-off-by: Liviu Ionescu <[email protected]> Reviewed-on: http://openocd.zylin.com/4566 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Tim Newsome <[email protected]> * target/arm_adi_v5: sync CSW and TAR cache on apreg write When using apreg to change AP registers CSW or TAR we get internal cached value not valid anymore. Reuse the setup functions for CSW and TAR to write them. Invalidate the cached value before the call to force the write, thus keeping original apreg behaviour. Change-Id: Ib14fafd5e584345de94f2e983de55406c588ac1c Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4565 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/arm_adi_v5: keep CSW and TAR cache updated The call to dap_queue_ap_write() can fail and the value in CSW and TAR becomes unknown. Invalidate the OpenOCD cache if dap_queue_ap_write() fails. Change-Id: Id6ec370b4c5ad07e454464780c1a1c8ae34ac870 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4564 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * tcl/target: Add Renesas R-Car R8A7794 E2 target Add configuration for the Renesas R-Car R8A7794 E2 target. This is an SoC with two Cortex A7 ARMv7a cores, both A7 cores are supported. Change-Id: Ic1c81840e3bfcef8ee1de5acedffae5c83612a5e Signed-off-by: Marek Vasut <[email protected]> Reviewed-on: http://openocd.zylin.com/4531 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/board: Add Renesas R-Car R8A7790 H2 Stout board Add configuration for the Renesas R-Car R8A7790 H2 based Stout ADAS board. Change-Id: Ib880b5d2e1fab5c8c0bc0dbcedcdce8055463fe2 Signed-off-by: Marek Vasut <[email protected]> Reviewed-on: http://openocd.zylin.com/4497 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/board: Add Renesas R-Car R8A7791 M2W Porter board Add configuration for the Renesas R-Car R8A7791 M2W based Porter evaluation board. Change-Id: Iaadb18f29748f890ebb68519ea9ddbd18e7649af Signed-off-by: Marek Vasut <[email protected]> Reviewed-on: http://openocd.zylin.com/4498 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/board: Add Renesas R-Car R8A7794 E2 Silk board Add configuration for the Renesas R-Car R8A7794 E2 based Silk evaluation board. Change-Id: I504b5630b1a2791ed6967c6c2af8851ceef9723f Signed-off-by: Marek Vasut <[email protected]> --- NOTE: This requires SW7[1] in position 1 (default is 0) Reviewed-on: http://openocd.zylin.com/4532 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/board: Factor out common R-Car Gen2 code Factor out the code shared by all R-Car Gen2 boards into a single file to get rid of the duplication. Change-Id: I70b302c2e71f4e6fdccb2817dd65a5493bb393d8 Signed-off-by: Marek Vasut <[email protected]> Reviewed-on: http://openocd.zylin.com/4533 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * jtag/drivers/cmsis-dap: fix connect in cmsis_dap_swd_switch_seq() The proc cmsis_dap_swd_switch_seq() is part of the SWD API for this interface driver. It is valid only when the interface is used in SWD mode. In this proc there is the need to call, in sequence, first cmsis_dap_cmd_DAP_Disconnect() then cmsis_dap_cmd_DAP_Connect(). The latter call requires the connection mode as parameter, that inside cmsis_dap_swd_switch_seq() can only be CONNECT_SWD. The current implementation is not correct and in some cases can pass mode CONNECT_JTAG. Moreover, JTAG is optional in CMSIS-DAP and passing mode CONNECT_JTAG triggers an error with SWD-only interfaces. Use mode CONNECT_SWD in SWD specific cmsis_dap_swd_switch_seq(). Change-Id: Ib455bf5b69cb2a2d146a6c8875387b00c27a5690 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4571 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_m: return error if breakpoint address is out of range If the "Flash Patch and Breakpoint" unit is rev.1 then it can only accept breakpoint addresses below 0x1FFFFFFF. Detailed info in "ARM v7-M Architecture Reference Manual", DDI0403E at chapter "C1.11 Flash Patch and Breakpoint unit". Print a message and return error if the address of hardware breakpoint cannot be handled by the breakpoint unit. Change-Id: I95c92b1f058f0dfc568bf03015f99e439b27c59b Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4535 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Christopher Head <[email protected]> * flash/nor/stm32: Report errors in wait_status_busy Flash operation errors that occur during algorithm programming are reported via the algorithm return value. However, Flash operation errors that occur during non-algorithm work (erasing, programming without a work area, programming the last non-multiple-of-32-bytes on an H7, etc.) generally end with a call to stm32x_wait_status_busy, which reads the status register and clears the error flags but fails to actually report that something went wrong should an error flag (other than WRPERR) be set. Return an error status from stm32x_wait_status_busy in those cases. Correct a log message accordingly. Change-Id: I09369ea5f924fe58833aec1f45e52320ab4aaf43 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4519 Tested-by: jenkins Reviewed-by: Spencer Oliver <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * flash/nor/stm32: Eliminate working area leak On a specific early-return path, an allocated working area was not freed. Free it. Change-Id: I7c8fe51ff475f191624086996be1c77251780b77 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4520 Tested-by: jenkins Reviewed-by: Spencer Oliver <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * flash/nor/stm32h7: Fix incorrect comment The name of the bit according to the reference manual is inconsistency error, not increment error. Change-Id: Ie3b73c0312db586e35519e03fd1a5cb225673d97 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4521 Tested-by: jenkins Reviewed-by: Spencer Oliver <[email protected]> * target: fix 'bp' command help message "asid" and "length" are separate arguments of the command. Put space between them. Change-Id: I36cfc1e3a01caafef4fc3b26972a0cc192b0b963 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4511 Tested-by: jenkins Reviewed-by: Christopher Head <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * Add ARM v8 AArch64 semihosting support This patch implements semihosting support for AArch64. This picks code from previously submitted AArch64 semihosting support patch and rebases on top of reworked semihosting code. Tested in AArch64 mode on a Lemaker Hikey Board with NewLib and GDB. Change-Id: I228a38f1de24f79e49ba99d8514d822a28c2950b Signed-off-by: Omair Javaid <[email protected]> Reviewed-on: http://openocd.zylin.com/4537 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * GDB fileIO stdout support This patch fixes gdb fileio support to allow gdb console to be used as stdout. Now we can do something like gdb <inferior file> (gdb) tar ext :3333 (gdb) load (gdb) monitor arm semihosting enable (gdb) monitor arm semihosting_fileio enable (gdb) continue Here: Output from inferior using puts, printf etc will be routed to gdb console. Change-Id: I9cb0dddda1de58038c84f5b035c38229828cd744 Signed-off-by: Omair Javaid <[email protected]> Reviewed-on: http://openocd.zylin.com/4538 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * target: armv8: Avoid semihosting segfault on halt Avoid a NULL pointer dereference when halting an aarch64 core. Change-Id: I333d40475ab26e2f0dca5c27302a5fa4d817a12f Signed-off-by: Andreas Färber <[email protected]> Reviewed-on: http://openocd.zylin.com/4593 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl: target: Add NXP LS1012A config As seen on the FRDM-LS1012A board. Change-Id: Ifc9074b3f7535167b9ded5f544501ec2879f5db7 Signed-off-by: Andreas Färber <[email protected]> Reviewed-on: http://openocd.zylin.com/4594 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl: board: Add NXP Freedom FRDM-LS1012A config An update for the K20 CMSIS-DAP firmware can be found here: https://community.nxp.com/thread/387080?commentID=840141#comment-840141 Change-Id: I149d7f8610aa56daf1aeb95f14ee1bf88f7cb647 Signed-off-by: Andreas Färber <[email protected]> Reviewed-on: http://openocd.zylin.com/4595 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * gdb_server: only trigger once the event gdb-detach at gdb quit When GDB quits (e.g. with "quit" command) we first execute gdb_detach() to reply "OK" then, at GDB disconnect (either TCP or pipe connection type), we execute gdb_connection_closed(). In case GDB is killed or it crashes, OpenOCD only executes the latter when detects the disconnection. Both gdb_detach() and gdb_connection_closed() trigger the event TARGET_EVENT_GDB_DETACH thus getting it triggered twice on clean GDB quit. Do not trigger the event TARGET_EVENT_GDB_DETACH in gdb_detach() and let only gdb_connection_closed() to handle it. Change-Id: Iacf035c855b8b3e2239c1c0e259c279688b418ee Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4585 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * gdb_server: set current_target from connection's one In a multi-target environment we are supposed to have a single gdb server for each target (or for each group of targets within a SMP node). By default, the gdb attached to a server sends its command to the target (or to the SMP node targets) linked to that server. This is working fine for the normal gdb commands, but it is broken for the native OpenOCD commands executed through gdb "monitor" command. In the latter case, gdb "monitor" commands will be executed on the current target of OpenOCD configuration script (that is either the last target created or the target specified in a "targets" command). Fixed in gdb_new_connection() by replacing the current target in the connection's copy of command context. Change-Id: If7c8f2dce4a3138f0907d3000dd0b15e670cfa80 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4586 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Christopher Head <[email protected]> * target/image: make i/j unsigned to avoid ubsan runtime error src/target/image.c:1055:15: runtime error: left shift of 128 by 24 places cannot be represented in type 'int' Change-Id: I322fd391cf3f242beffc8a274824763c8c5e69a4 Signed-off-by: Cody Schafer <[email protected]> Reviewed-on: http://openocd.zylin.com/4584 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Christopher Head <[email protected]> * target/stm32f7x: Clear stuck HSE clock with CSS Change-Id: Ica0025ea465910dd664ab546b66f4f25b271f1f5 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4570 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <[email protected]> * psoc5lp: fix erase check, add free_driver_priv psoc5lp_erase_check() was not properly adapted to the new armv7m_blank_check_memory() in the hot fix 53376dbbede4f0bf42e724ff This change fixes handling of num_sectors in dependecy of ecc_enabled. Also add comments how ecc_enabled influences num_sectors. Add pointer to default_flash_free_driver_priv() to all psoc5lp flash drivers to keep valgrind happy. Change-Id: Ie1806538becd364fe0efb7a414f0fe6a84b2055b Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4569 Tested-by: jenkins * target: atmel samd10 xplained mini cortex m0+ on a tiny board, with an mEDBG (CMSIS-DAP) debug interface. Change-Id: Iaedfab578b4eb4aa2d923bd80f220f59b34e6ef9 Signed-off-by: Karl Palsson <[email protected]> Reviewed-on: http://openocd.zylin.com/3402 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * tcl/board: add SAMD11 Xplained Pro evaluation board Change-Id: Id996c4de6dc9f25f71424017bf07689fea7bd3af Signed-off-by: Peter Lawrence <[email protected]> Reviewed-on: http://openocd.zylin.com/4507 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * Adds SAMD11D14AU flash support. Corrects names of SAMD11D14AM and SAMD11D14ASS per datasheet. Change-Id: I8beb15d5376966a4f8d7de76bfb2cbda2db440dc Signed-off-by: Christopher Hoover <[email protected]> Reviewed-on: http://openocd.zylin.com/4597 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * nds32: Avoid detected JTAG clock AICE2 doesn't support scan for the maximum clock frequency of JTAG chain. It will cause USB command timeout. Change-Id: I41d1e3be387b6ed5a4dd0be663385a5f053fbcf9 Signed-off-by: Hellosun Wu <[email protected]> Reviewed-on: http://openocd.zylin.com/4292 Tested-by: jenkins Reviewed-by: Hsiangkai Wang <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * flash/nor/tcl: Distinguish between sectors and blocks in status messages Use the right word in flash protect command status messages based on whether the target bank defines num_prot_blocks. Minor message style tidy-up. Change-Id: I5f40fb5627422536ce737f242fbf80feafe7a1fc Signed-off-by: Dominik Peklo <[email protected]> Reviewed-on: http://openocd.zylin.com/4573 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Christopher Head <[email protected]> * drivers: cmsis-dap: pull up common connect code Just a minor deduplication Change-Id: Idd256883e5f6d4bd4dcc18462dd5468991f507b3 Signed-off-by: Karl Palsson <[email protected]> Reviewed-on: http://openocd.zylin.com/3403 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * drivers: cmsis-dap: Print version info when available No need to wait until after connecting, might help diagnose part information by printing earlier. Change-Id: I51eb0d584be306baa811fbeb1ad6a604773e602c Signed-off-by: Karl Palsson <[email protected]> Reviewed-on: http://openocd.zylin.com/3404 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * flash/nor: add support for TI MSP432 devices Added msp432 flash driver to support the TI MSP432P4x and MSP432E4x microcontrollers. Implemented the flash algo helper as used in the TI debug and flash tools. This implemention supports the MSP432E4, Falcon, and Falcon 2M variants. The flash driver automatically detects the connected variant and configures itself appropriately. Added command to mass erase device for consistency with TI tools and added command to unlock the protected BSL region. Tested using MSP432E401Y, MSP432P401R, and MSP432P4111 LaunchPads. Tested with embedded XDS110 debug probe in CMSIS-DAP mode and with external SEGGER J-Link probe. Removed ti_msp432p4xx.cfg file made obsolete by this patch. Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0 Signed-off-by: Edward Fewell <[email protected]> Reviewed-on: http://openocd.zylin.com/4153 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms count There was already a github fork that had this fixed, but as we try to use the latest, non-modified version of all software we use, I would like to have this fix in the next releases of OpenOCD so that if people uses $packagemanager, they will not have issues flashing the last part of the flash of sam4sa16c chips. Additionally, I've added some more logging related to the flash bank that was used, and the chip ID that was detected. Change-Id: I7ea5970105906e4560b727e46222ae9a91e41559 Signed-off-by: Erwin Oegema <[email protected]> Reviewed-on: http://openocd.zylin.com/4599 Reviewed-by: Tomas Vanek <[email protected]> Tested-by: jenkins * flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devices Change-Id: Ic92b0fb5b738af3bec79ae335876aa9e26f5f4cd Signed-off-by: Marc Schink <[email protected]> Reviewed-on: http://openocd.zylin.com/4600 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Antonio Borneo <[email protected]> * Avoid null target->semihosting references. The new common semihosting code introduced a bug, in certain conditions target->semihosting was used without semihosting being initialised. The solution was to explicitly test for target->semihosting before dereferencing it. Change-Id: I4c83e596140c68fe4ab32e586e51f7e981a40798 Signed-off-by: Liviu Ionescu <[email protected]> Reviewed-on: http://openocd.zylin.com/4603 Tested-by: jenkins Reviewed-by: Jonathan Larmour <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * nrf5: Add HWID 0x139 (52832 rev E0) Change-Id: I71b7471ccfcb8fcc6de30da57ce4165c7fb1f73f Signed-off-by: James Jacobsson <[email protected]> Reviewed-on: http://openocd.zylin.com/4604 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target: Fix segfault for 'mem2array' Call 'mem2array' without arguments to reproduce the segmentation fault. Change-Id: I02bf46cc8bd317abbb721a8c75d7cbfac99eb34e Signed-off-by: Marc Schink <[email protected]> Reviewed-on: http://openocd.zylin.com/4534 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> Reviewed-by: Christopher Head <[email protected]> * target/armv7m_trace: Fix typo in enum Change-Id: I6364ee5011ef2d55c59674e3b97504a285de0cb2 Signed-off-by: Marc Schink <[email protected]> Reviewed-on: http://openocd.zylin.com/3904 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * target/armv7m_trace: Use prefix for enums Change-Id: I3f199e6053146a1094d96b98ea174b41bb021599 Signed-off-by: Marc Schink <[email protected]> Reviewed-on: http://openocd.zylin.com/3905 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * target/aarch64: Call aarch64_init_debug_access() earlier in aarch64_deassert_reset() On Renesas R-Car, calling 'reset halt' and 'reset init' always made DAP inaccessible. Calling 'reset' and 'halt' seperatly worked fine. The only differences seems to be the point in time when aarch64_init_debug_access() is called. This patch aligns the behaviour. Change-Id: I2296c65e48414a7d9846f12a395e5eca315b49ca Signed-off-by: Dennis Ostermann <[email protected]> Reviewed-on: http://openocd.zylin.com/4607 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * server: Improve signal handling under Linux Commit 5087a955 added custom signal handlers for the openocd server process. Before this commit, when openocd is run as a background process having the same controlling terminal as gdb, Control-C would be handled by gdb to stop target execution and return to the gdb prompt. However, after commit 5087a955, the SIGINT caused by pressing Control-C also terminates openocd, effectively crashing the debugging session. The only way to avoid this is run openocd in a different controling terminal or to detach openocd from its controlling terminal, thus losing all job control for the openocd process. This patch improves the server's handling of POSIX signals: 1) Keyboard generated signals (INT and QUIT) are ignored when server process has is no controlling terminal. 2) SIGHUP and SIGPIPE are handled to ensure that .quit functions for each interface are called if user's logs out of X session or there is a network failure. SIG_INT & SIG_QUIT still stop openocd when it is running in the foreground. Change-Id: I03ad645e62408fdaf4edc49a3550b89b287eda10 Signed-off-by: Brent Roman <[email protected]> Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/3963 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> * armv7a: read ttbcr and ttb0/1 at every entry in debug state Commit bfc5c764df145f68835543119865eabe462e19c2 avoids reading ttbcr and ttb0/1 at every virt2phys translation by caching them, and it updates the cached values in armv7a_arch_state(). But the purpose of any (*arch_state)() method, thus including armv7a_arch_state(), is to only print out and inform the user about some architecture specific status. Moreover, to reduce the verbosity during a GDB session, the method (*arch_state)() is not executed anymore at debug state entry (check use of target->verbose_halt_msg in src/openocd.c), thus the state of translation table gets out-of-sync triggering Error: Address translation failure or even using a wrong address in the memory R/W operation. In addition, the commit above breaks the case of armv7r by calling armv7a_read_ttbcr() unconditionally. Fixed by moving in cortex_a_post_debug_entry() the call to armv7a_read_ttbcr() on armv7a case only. Remove the call to armv7a_read_ttbcr() in armv7a_identify_cache() since it is (conditionally) called only in the same procedure cortex_a_post_debug_entry(). Fixes: bfc5c764df14 ("armv7a: cache ttbcr and ttb0/1 on debug state entry") Change-Id: Ifc20eca190111832e339a01b7f85d28c1547c8ba Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4601 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * Avoid dereferencing NULL pointer. If a NULL pointer is passed, don't attempt to increment it. This avoids passing the now not-NULL pointer on and eventually segfaulting. Also remove some unnecessary temporary variables. Change-Id: I268e225121aa283d59179bfae407ebf6959d3a4e Signed-off-by: Darius Rad <[email protected]> Reviewed-on: http://openocd.zylin.com/4550 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <[email protected]> * Remove FSF mailing address. Checkpatch complains about this (FSF_MAILING_ADDRESS). Change-Id: Ib46a7704f9aed4ed16ce7733d43c58254a094149 Signed-off-by: Tim Newsome <[email protected]> Reviewed-on: http://openocd.zylin.com/4559 Tested-by: jenkins Reviewed-by: Spencer Oliver <[email protected]> * drivers: cmsis_dap_usb: implement cmd JTAG_TMS Simply add a wrapper around cmsis_dap_cmd_DAP_SWJ_Sequence() Change-Id: Icf86f84b24e9fec56e2f9e155396aac34b0e06d2 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4517 Tested-by: jenkins Reviewed-by: Spencer Oliver <[email protected]> * arm_adi_v5: put SWJ-DP back to JTAG mode at exit When SWD mode is used, current OpenOCD code left the SWJ-DP in SWD mode at exit. Also, current code is unable to switch back the SWJ-DP in JTAG at next run, thus a power cycle of both target and interface is required in order to run OpenOCD in JTAG mode again. Put the SWJ-DP back to JTAG mode before exit from OpenOCD. Use switch_seq(SWD_TO_JTAG) instead of dap_to_jtag(), because the latter is not implemented on some interfaces. This is aligned with the use of switch_seq(JTAG_TO_SWD) in swd_connect(). Change-Id: I55d3faebe60d6402037ec39dd9700dc5f17c53b0 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4493 Tested-by: jenkins Reviewed-by: Bohdan Tymkiv <[email protected]> Reviewed-by: Matthias Welwarsky <[email protected]> * Add RISC-V support. This supports both 0.11 and 0.13 versions of the debug spec. Support for `-rtos riscv` will come in a separate commit since it was easy to separate out, and is likely to be more controversial. Flash support for the SiFive boards will also come in a later commit. Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190 Signed-off-by: Tim Newsome <[email protected]> Reviewed-on: http://openocd.zylin.com/4578 Tested-by: jenkins Reviewed-by: Liviu Ionescu <[email protected]> Reviewed-by: Matthias Welwarsky <[email protected]> * usb_blaster: Don't unnecessarily go through DR-/IR-Pause There is no need to pass through DR-/IR-Pause after a scan if we want to go to DR-/IR-Update. We just have to skip the first step of the path to the end state because we already did that step when shifting the last bit. v2: - Fix comments as remarked in review of v1 Change-Id: I3c10f02794b2233f63d2150934e2768430873caa Signed-off-by: Daniel Glöckner <[email protected]> Reviewed-on: http://openocd.zylin.com/4245 Tested-by: jenkins Reviewed-by: Christopher Head <[email protected]> Reviewed-by: Matthias Welwarsky <[email protected]> * cortex_a: fix virt2phys when mmu is disabled When the MMU is not enabled on debug state entry, virt2phys cannot perform a translation since it is unknown whether a valid MMU configuration existed before. In this case, return the virtual address as physical address. Change-Id: I6f85a7a5dbc200be1a4b5badf10a1a717f1c79c0 Signed-off-by: Matthias Welwarsky <[email protected]> Reviewed-on: http://openocd.zylin.com/4480 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> Reviewed-by: Matthias Welwarsky <[email protected]> * drivers: cmsis-dap: print serial if available Helpful for sanity checking connections Change-Id: Ife0d8b4e12d4c03685aac8115c9739a4c1e994fe Signed-off-by: Karl Palsson <[email protected]> Reviewed-on: http://openocd.zylin.com/3405 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_m: make a variable local The vec_ids variable is not referenced anywhere other than the vector catch command handler. Make it local to that function. Change-Id: Ie5865e8f78698c19a09f0b9d58269ced1c9db440 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4606 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_a: fix compile error for uninitialized variable Commit ad6c71e151590f9d07eb07eda978a8d2a845259c introduced the variable "mmu_enabled" whose pointer is passed to cortex_a_mmu() that initialises it. This initialization is not visible to the compiler that issue a compile error. The same situation is common across the same file and the usual workaround is to initialize it to zero; thus the same fix i applied here. Ticket: https://sourceforge.net/p/openocd/tickets/197/ Fixes: commit ad6c71e15159 ("cortex_a: fix virt2phys when mmu is disabled") Change-Id: I77dec41acdf4c715b45ae37b72e36719d96d9283 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4619 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * mips_m4k: add optional reset handler In some cases by using SRST we can't halt CPU early enough. And option PrRst is not available too. In this case the only way is to set BOOT flag over EJTAG and reset CPU or SoC from CPU itself. For example by writing to some reset register. This patch is providing possibility to use user defined reset-assert handler which will be enabled only in case SRST is disabled. It is needed to be able switch between two different reset variants on run time. Change-Id: I6ef98f1871ea657115877190f7cc7a5e8f3233e4 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4404 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * tcl/target: add config for Qualcomm QCA4531 The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT). https://www.qualcomm.com/products/qca4531 Change-Id: I58398c00943b005cfaf0ac1eaad92d1fa4e2cba7 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4405 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * tcl/board: add config for 8devices LIMA board More information about this board can be found here: https://www.8devices.com/products/lima Change-Id: Id35a35d3e986630d58d37b47828870afd107cc6a Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4406 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * tcl/target|board: move common AR9331 code to atheros_ar9331.cfg The ar9331_25mhz_pll_init and ar9331_ddr1_init routines can be used not only for TP-Link MR3020 board, so move them to the common atheros_ar9331.cfg file. Change-Id: I04090856b08151d6bb0f5ef9cc654efae1c81835 Signed-off-by: Antony Pavlov <[email protected]> Reviewed-on: http://openocd.zylin.com/2999 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * tcl/target/atheros_ar9331: add DDR2 helper this helper works on many different boards, so it is good to have it in target config Change-Id: I068deac36fdd73dbbcedffc87865cc5b9d992c1d Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4422 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * tcl/target/atheros_ar9331: add documentation and extra helpers Sync it with experience gathered on Qualcomm QCA4531 SoC. This chips are in many ways similar. Change-Id: I06b9c85e5985a09a9be3cb6cc0ce3b37695d2e54 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4423 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * tcl/board: add DPTechnics DPT-Board-v1 it is Atheros AR9331 based IoT dev board. Change-Id: I6fc3cdea1bef49c53045018ff5acfec4d5610ba6 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4424 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * fpga/altera-10m50: add all device id add all currently know Intel (Alter) MAX 10 device ids Change-Id: I6a88fef222c8e206812499d41be863c3d89fa944 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4598 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * target|board: Add Intel (Altera) Arria 10 target and related board Target information about this SoC can be found here: https://www.altera.com/products/fpga/arria-series/arria-10/overview.html Achilles Instant-Development Kit Arria 10 SoC SoM: https://www.reflexces.com/products-solutions/development-kits/arria-10/achilles-instant-development-kit-arria-10-soc-som Change-Id: Id78c741be6a8b7d3a70f37d41088e47ee61b437a Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4583 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * target/riscv: fix compile error with gcc 8.1.1 Fix compile error: src/target/riscv/riscv-011.c: In function ‘slot_offset’: src/target/riscv/riscv-011.c:238:4: error: this statement may fall through [-Werror=implicit-fallthrough=] switch (slot) { ^~~~~~ src/target/riscv/riscv-011.c:243:3: note: here case 64: ^~~~ Fixes: a51ab8ddf63a ("Add RISC-V support.") Change-Id: I7fa86b305bd90cc590fd4359c3698632d44712e5 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4618 Tested-by: jenkins Reviewed-by: Jiri Kastner <[email protected]> Reviewed-by: Oleksij Rempel <[email protected]> Reviewed-by: Tim Newsome <[email protected]> Reviewed-by: Paul Fertser <[email protected]> * server: explicitly call "shutdown" when catch CTRL-C or a signal Every TCL command can be renamed (or deleted) and then replaced by a TCL proc that has the same name of the original TCL command. This can be used either to completely replace an existing command or to wrap the original command to extend its functionality. This applies also to the OpenOCD command "shutdown" and can be useful, for example, to set back some default value to the target before quitting OpenOCD. E.g. (TCL code): rename shutdown original_shutdown proc shutdown {} { puts "This is my implementation of shutdown" # my own stuff before exit OpenOCD original_shutdown } Unfortunately, sending a signal (or pressing CTRL-C) to terminate OpenOCD doesn't trigger calling the original "shutdown" command nor its (eventual) replacement. Detect if the main loop is terminated by an external signal and in such case execute explicitly the command "shutdown". Replace with enum the magic numbers assumed by "shutdown_openocd". Please notice that it's possible to write a custom "shutdown" TCL proc that does not call the original "shutdown" command. This is useful, for example, to prevent the user to quit OpenOCD by typing "shutdown" in the telnet session. Such case will not prevent OpenOCD to terminate when receiving a signal; OpenOCD will quit after executing the custom "shutdown" command. Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4551 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * zy1000: fix compile error with gcc 8.1.1 The fall-through comment is not taken in consideration by gcc 8.1.1 because it is inside the braces of a C-code block. Move the comment outside the C block. Change-Id: I22d87b2dee109fb8bcf2071ac55fdf7171ffcf4b Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4614 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler Steps to reproduce ( STM32F103 'Blue Pill', 128KiB of flash ): > flash fillh 0x0801FFFE 00 1 wrote 2 bytes to 0x0801fffe in 0.019088s (0.102 KiB/s) > flash fillw 0x0801FFFE 00 1 Error: stm32f1x.cpu -- clearing lockup after double fault Error: error waiting for target flash write algorithm Error: error writing to flash at address 0x08000000 at offset 0x0001fffe Change-Id: I145092ec5e45bc586b3df48bf37c38c9226915c1 Signed-off-by: Bohdan Tymkiv <[email protected]> Reviewed-on: http://openocd.zylin.com/4516 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/arm_adi_v5: add command "dpreg" For very low level debug or development around DAP, it is useful to have direct access to DP registers. Add command "dpreg" by mimic the syntax of the existing "apreg" command: $dap_name dpreg reg [value] Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4612 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * nrf5: add free_driver_priv Change-Id: I429a9868deb0c4b51f47a4bbad844bdc348e8d21 Signed-off-by: Jim Paris <[email protected]> Reviewed-on: http://openocd.zylin.com/4608 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * rtos: add support for NuttX This patch introduces RTOS support for NuttX. Currently, only ARM Cortex-M (both FPU and FPU-less) targets are supported. To use, add the following lines to ~/.gdbinit. define hookpost-file eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name) end And please make sure the above values are the same as in src/rtos/nuttx_header.h Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f Signed-off-by: Masayuki Ishikawa <[email protected]> Signed-off-by: Masatoshi Tateishi <[email protected]> Signed-off-by: Nobuto Kobayashi <[email protected]> Reviewed-on: http://openocd.zylin.com/4103 Tested-by: jenkins Reviewed-by: Alan Carvalho de Assis <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * server/server: Add ability to remove services Add the ability to remove services while OpenOCD is running. Change-Id: I4067916fda6d03485463fa40901b40484d94e24e Signed-off-by: Marc Schink <[email protected]> Reviewed-on: http://openocd.zylin.com/4054 Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_m: fix incorrect comment The code sets C_MASKINTS if that bit is not already set (correctly). Fix the comment to agree. Change-Id: If4543e2660a9fa2cdabb2d2698427a6c8d9a274c Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4620 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * tcl/target/stm32f0x: Allow overriding the Flash bank size Copy & paste from another stm32 target. Change-Id: I0f6cbcec974ce70c23c1850526354106caee1172 Signed-off-by: Dominik Peklo <[email protected]> Reviewed-on: http://openocd.zylin.com/4575 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/target: add Allwinner V3s SoC support Change-Id: I2459d2b137050985b7301047f9651951d72d9e9e Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4427 Tested-by: jenkins Reviewed-by: Paul Fertser <[email protected]> * target/arm_adi_v5: allow commands apsel and apcsw during init phase The current implementation of apsel cannot be executed during the initialization phase because it queries the DAP AP to retrieve and print the content of IDR register, and the query is only possible later on during the exec phase. But IDR information is already printed by the dedicated command apid, making redundant printing it by apsel too. Being unable to run apsel during initialization, makes also apcsw command (that depends on apsel) not usable in such phase. Modify the command apsel to only set the current AP, without making any transfer to the (possibly not initialized yet) DAP. When run without parameters, just print the current AP number. Change mode to COMMAND_ANY to apsel and to apcsw. Change-Id: Ibea6d531e435d1d49d782de1ed8ee6846e91bfdf Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4624 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_a: allow command dacrfixup during init phase There is no reason to restrict the command "cortex_a dacrfixup" to the EXEC phase only. Change the command mode to ANY so the command can be used in the initialization phase too. Change-Id: I498cc6b2dbdc48b3b2dd5f0445519a51857b295f Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4623 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * target/armv7a_cache: add gdb keep-alive and fix a missing dpm finish Depending on range size, the loop on cache operations can take quite some time, causing gdb to timeout. Add keep-alive to prevent gdb to timeout. Add also a missing dpm->finish() to balance dpm->prepare(). Change-Id: Ia87934b1ec19a0332bb50e3010b582381e5f3685 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4627 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * Add detail to `wrong register size` error. Signed-off-by: Tim Newsome <[email protected]> Change-Id: Id31499c94b539969970251145e42c89c943fd87c Reviewed-on: http://openocd.zylin.com/4577 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * doc: fix typo in cortex_m maskisr command Change-Id: I37795c320ff7cbf6f2c7434e03b26dbaf6fc6db4 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4621 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_m: restore C_MASKINTS after reset The cortex_m maskisr user-facing setting is not changed across a target reset. However, the in-core C_MASKINTS bit was always cleared as part of reset processing, meaning that a cortex_m maskisr on setting would not be respected after a reset. Set C_MASKINTS based on the user-facing setting value rather than always clearing it after reset. Change-Id: I5aa5b9dfde04a0fb9c6816fa55b5ef1faf39f8de Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4605 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * tcl/board: update all uses of interface/stlink-v2-1 to interface/stlink Change-Id: I5e27e84d022f73101376e8b4a1bdc65f58fd348a Signed-off-by: Cody P Schafer <[email protected]> Reviewed-on: http://openocd.zylin.com/4456 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/riscv/riscv-011: fix compile warning about uninitialized variable In MSYS2 MinGW 64-bit git clone git://git.code.sf.net/p/openocd/code openocd $ gcc --version gcc.exe (Rev1, Built by MSYS2 project) 8.2.0 ./bootstrap ./configure --prefix= $ cat config.status | grep CFLAGS CFLAGS='-g -O2' make bindir = "bin-x64" depbase=`echo src/target/riscv/riscv-011.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ /bin/sh ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF $depbase.Tpo -c -o src/target/riscv/riscv-011.lo src/target/riscv/riscv-011.c &&\ mv -f $depbase.Tpo $depbase.Plo libtool: compile: gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF src/target/riscv/.deps/riscv-011.Tpo -c src/target/riscv/riscv-011.c -o src/target/riscv/riscv-011.o src/target/riscv/riscv-011.c: In function 'poll_target': src/target/riscv/riscv-011.c:1799:6: error: 'reg' may be used uninitialized in this function [-Werror=maybe-uninitialized] reg_cache_set(target, reg, ((data & 0xffffffff) << 32) | value); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ src/target/riscv/riscv-011.c:1686:17: note: 'reg' was declared here unsigned int reg; ^~~ cc1.exe: all warnings being treated as errors make[2]: *** [Makefile:3250: src/target/riscv/riscv-011.lo] Error 1 Change-Id: I6996dcb866fbace26817636f4bedba09510a087f Signed-off-by: Svetoslav Enchev <[email protected]> Reviewed-on: http://openocd.zylin.com/4635 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> Reviewed-by: Tim Newsome <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * max32xxx: Support for MAX32XXX devices. Adding flash programming support for Maxim Integrated MAX32XXX devices. Change-Id: I5b0f57a885f9d813240e4bc2d9f765b743e1cfc3 Signed-off-by: Kevin Gillespie <[email protected]> Reviewed-on: http://openocd.zylin.com/3543 Tested-by: jenkins Reviewed-by: Ismail H. KOSE <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Andreas Fritiofson <[email protected]> * flash/at91sam4: run probe just once Reread registers in sam4_GetInfo() Change-Id: I3b023b3e642a9c052b5c41673d196317f7e7f2e3 Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4609 Tested-by: jenkins Reviewed-by: Erwin Oegema <[email protected]> Reviewed-by: Svetoslav Enchev <[email protected]> * flash/at91sam4: emit flash bank info Change related LOG_INFO to LOG_DEBUG Change-Id: I0c09b1ec83da631b26980dc8632b9031fe2921a3 Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4610 Tested-by: jenkins Reviewed-by: Erwin Oegema <[email protected]> Reviewed-by: Svetoslav Enchev <[email protected]> * flash/at91sam4: set wait states only once per write Read-modify-write setting of FMR register requires an USB turnaround. Setting FMR before each page write is not necessary and decreases the write speed. Change-Id: I67844c898aaf117f155c762c979840b603c767ed Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4611 Tested-by: jenkins Reviewed-by: Svetoslav Enchev <[email protected]> * flash/at91sam4: fix clang static analyzer warning Change-Id: I5e5319d855c868adfa012f68086f7f809ec5a069 Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4639 Tested-by: jenkins * rtos/linux.c: fix clang static analyzer warning Remove sizeof(int64_t) from string size computation. Change-Id: I029b394df5d62a2594a723c4c0e13608b3423b9b Signed-off-by: Tomas Vanek <[email protected]> Reviewed-on: http://openocd.zylin.com/4640 Tested-by: jenkins * target: armv8: Ensure target is halted for virt2phys Othewise the error reported as Timeout waiting for dpm prepare Change-Id: Ieed2fdcd94ae4e877a749df3eec07a01dbf80b10 Closes: https://sourceforge.net/p/openocd/tickets/201/ Found-by: Matthias Welwarsky <[email protected]> Signed-off-by: Guido Günther <[email protected]> Reviewed-on: http://openocd.zylin.com/4647 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * adi_v5: enforce check on AP number value The AP number value is restricted in 8 bits unsigned by ADI-v5 specification. Nevertheless, an "invalid" value is used by target cortex-m to force an automatic detection of the AP. Replace magic numbers by using new macros for AP max number and for the value of AP invalid. Check the value passed through -ap-num flag during configuration. Change-Id: Ic19a367db0ab11c0ebd070750eca0647d25279a5 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4668 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * gdb_server: add per target option "-gdb-port" The argument passed to global config command "gdb_port" is usually, but not always, a TCP port number. In case of multiple targets, this numeric value is used as the first port of a set of consecutive TCP ports assigned one per target. If the argument is not a numeric value (e.g. "pipe", "disabled", ...) then incrementing it for the next target has no sense. Add the option "-gdb-port number" to the commands "target create" and "$target_name configure" to override, for the specific target, the general global configuration. This permits to use a per target "-gdb-port disabled", when no gdb port is required for that specific target. It also makes possible to choose a custom TCP port number for each target, overriding the usual sequence of consecutive port numbers. Change-Id: I3b9a1910b28ab4bc757e839d0e5d08ffc29f7ab4 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4530 Tested-by: jenkins Reviewed-by: Christopher Head <[email protected]> Reviewed-by: Matthias Welwarsky <[email protected]> * libusb: return oocd error values keep same return style where possible Change-Id: I2f9b85dbc307a483609f76a84de77e3c74d346c7 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4588 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * rtos-helpers: fix minor typo in uC/OS-III helper This patch corrects a spelling error in uCOS-III-openocd.c. Change-Id: I6d1923ff1f5e6361358c45cec3dd6c08ca9ccef0 Signed-off-by: Steven Stallion <[email protected]> Reviewed-on: http://openocd.zylin.com/4659 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> * flash/stm32f2x: add stm32f7 revision Z identification Signed-off-by: Cody P Schafer <[email protected]> Change-Id: Ia0169514d494bae2a98d92ebc97c8eccc10bc6c4 Reviewed-on: http://openocd.zylin.com/4657 Tested-by: jenkins Reviewed-by: Christopher Head <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * target/mem_ap: generic mem-ap target This pseudo target allows attaching to any access point on the DAP at the MEM-AP level and read and write addresses on the connected bus. For example, one can create a mem_ap target on the APB-AP and read and write registers of debug components directly. This allows many diagnostic and other features be programmed entirely using TCL, without necessity of adding drivers to OpenOCD. Change-Id: I53229ffd68fb0f96fb68be15b0f3a76cc8843c8e Signed-off-by: Matthias Welwarsky <[email protected]> Reviewed-on: http://openocd.zylin.com/4002 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> Reviewed-by: Leonard Crestez <[email protected]> * interface: adapter configuration for FTDI C232HM This patch adds support for the C232HM-DDSL-0 and C232HM-EDSL-0 FT232H-based cables from FTDI. For more information, see: http://www.ftdichip.com/Products/Cables/USBMPSSE.htm Change-Id: Ic97423eb1e2f6b5ebae04943cd5cce86f38771d5 Signed-off-by: Steven Stallion <[email protected]> Reviewed-on: http://openocd.zylin.com/4081 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * ftdi: extend ftdi_location format To existing <bus>:<port>,<port> format add <bus>-<port>.<port> support. The last format is used by kernel and other drivers. Change-Id: I6528970d3af4f6a8bf7b27a0f7a763b5957fdf2b Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-on: http://openocd.zylin.com/4631 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * target/cortex_a: poll all targets in SMP node after halt The periodic poll scans all the targets in the same order they have been declared in the configuration file. When one target in a SMP node halts, the transition is detected in the following poll and this triggers a halt request to all the other cores of the SMP node. The targets that will be polled afterwards will be identified as "halted", but the targets already scanned will remain as "running" until the next periodic poll. This creates a race condition with GDB; GDB sets the breakpoints when runs the target and removes them as soon as the target is halted. When it receives the halt event, it starts removing the breakpoints and fails on the targets that are still reported as "running". Fixed by polling all the targets in the SMP node before informing GDB about the halt event. This implementation is almost copy/paste from the one in aarch64. Change-Id: Id2bd99f1e56b014e48e9e34ccb891b4219c518f8 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4622 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/board: Add Emcraft imx8 SOM BSB support Tested with Olimex ARM-USB-TINY-H adapter Simple commands work fine but there are currently issues when attaching remote gdb or running virt2phys: https://sourceforge.net/p/openocd/tickets/201/ Change-Id: I86ccf1d93c5d23870bb522f92b3e2af190d529e8 Signed-off-by: Guido Günther <[email protected]> Reviewed-on: http://openocd.zylin.com/4646 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * arm_adi_v5: remove useless cast to int The field ap_num in struct adiv5_private_config is already of type int. Casting it to type int has no sense. Change-Id: Ida642e808c02591bb58609425eccd096d404e2c4 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4666 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * flash/nrf5: time-based timeout waiting for flash controller Change-Id: Id214df154dc359ca130c8d8fe1554d106621b9cd Signed-off-by: Kai Geissdoerfer <[email protected]> Reviewed-on: http://openocd.zylin.com/4648 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * flash/nrf5: support for nRF52840 Q1AAC0 Change-Id: Id3280dadece84e1d68544936e44d506c7930a55d Signed-off-by: Kai Geissdoerfer <[email protected]> Reviewed-on: http://openocd.zylin.com/4649 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * doc: fix use of deprecated config file in the example Commit 31c58c139d85 ("jtag: drivers: stlink: handle all versions with single config") deprecates the use of "interface/stlink-v2-1.cfg" in favor of a unique config file "interface/stlink.cfg". Update the example in the documentation. Change-Id: I1aed7c70e15f4edb4f81a3ee8e3bce575fde873b Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4667 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <[email protected]> * Added support for STM32L4X option bytes writing. Enables the programming of Write protection lock bits. - Updated/re-factored with option_read, option_write and option_load commands. Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025 Signed-off-by: Thomas Søhus <[email protected]> Reviewed-on: http://openocd.zylin.com/4654 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * Clarify what exactly the RISC-V code supports. Change-Id: I8da657426cc52c738ab41bfb0164cbc6721c0aef Signed-off-by: Tim Newsome <[email protected]> Reviewed-on: http://openocd.zylin.com/4655 Tested-by: jenkins Reviewed-by: Philipp Guehring <[email protected]> Reviewed-by: Liviu Ionescu <[email protected]> Reviewed-by: Tomas Vanek <[email protected]> * target/cortex_m: fix typo The subunit of the debug unit is called the Flash Patch and Breakpoint unit, abbreviated (by ARM no less) as FPB, not FBP. Change-Id: Ia2f08470da705f0f1518feeca878f0f500507308 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4675 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Antonio Borneo <[email protected]> * contrib/60-openocd.rules: provide hint to reload udev rules No need to reboot the Linux box when new rules are added to udev. Suggest the command in the script header. Change-Id: Ie95383bfd73914a3d2e2c05d77fa3eb32e68b7e2 Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4665 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <[email protected]> * target/stm32: make APCSW cacheable Change-Id: I7c5c9720ded329848647f17db95f845e46c01c19 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4674 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * target/atsamv: make APCSW cacheable Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746 Signed-off-by: Christopher Head <[email protected]> Reviewed-on: http://openocd.zylin.com/4678 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> * gdb_server: avoid gdb server for virtual targets Virtual targets, like mem_ap, do not or cannot implement the required functionality to accept a GDB connection. In the case of mem_ap, the method get_gdb_reg_list() is missing and a following connection from gdb causes OpenOCD to segfault. OpenOCD opens a GDB port for each target; it's always possible to connect, by mistake, GDB to one virtual target. Add a method to check if the target supports GDB connections (for the moment just checking if get_gdb_reg_list is implemented). Skip opening a gdb server for every targets that don't support GDB connections. Change-Id: Ia439a43efe1a9adbb1771cd9d252db8ffa32eb9d Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4676 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/target: Add Renesas R-Car Gen3 targets Add configuration for the Renesas R-Car Generation 3 targets. These are SoCs with Cortex A57s, A53s, and R7s. All cores are supported. Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70 Signed-off-by: Adam Bass <[email protected]> Reviewed-on: http://openocd.zylin.com/4669 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * tcl/board: Add Renesas R-Car Salvator-X(S) boards. Add configuration for the Renesas R-Car Salvator-X and Renesas R-Car Salvator-XS boards. Change-Id: I898008f56adb31908d30760f18217583fabf1c51 Signed-off-by: Adam Bass <[email protected]> Reviewed-on: http://openocd.zylin.com/4670 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * flash/nrf5: support for nRF52810 Change-Id: I01c430bfa593d20ea7a51c90d67052e374d239b3 Signed-off-by: Anders Westrup <[email protected]> Reviewed-on: http://openocd.zylin.com/4680 Tested-by: jenkins Reviewed-by: Tomas Vanek <[email protected]> Reviewed-by: Slowcoder <[email protected]> * drivers: cmsis-dap: fix connection in JTAG mode Commit 5aceec24122bc222896cfcfd91f7f082f630ac83 ("drivers: cmsis-dap: pull up common connect code") breaks the driver and it cannot connect anymore in JTAG mode. The issue is caused in cmsis_dap_init() by anticipating the call to cmsis_dap_usb_open(), which then sets cmsis_dap_handle and makes the following test to always fail. Actually the original code was quite tricky: if (swd_mode) do something that also sets cmsis_dap_handle; if (cmsis_dap_handle == NULL) do something for !swd_mode; Convert the sequence of tricky "if"s in a single "if-then-else" to handle clearly the cases swd_mode and !swd_mode. Change-Id: I359a23bf26a3edc2461f4352daa0be83e78868f7 Fixes: 5aceec24122b ("drivers: cmsis-dap: pull up common connect code") Signed-off-by: Antonio Borneo <[email protected]> Reviewed-on: http://openocd.zylin.com/4697 Reviewed-by: Tomas Vanek <[email protected]> Tested-by: jenkins * register: support non-existent registers This patch fixes a number of bugs caused by incomplete support for non-existent registers. This is needed for targets that provide optional registers or non-linear register numbers. Change-Id: I216196e0051f28887a2c3da410959382369eed80 Signed-off-by: Steven Stallion <[email protected]> Reviewed-on: http://openocd.zylin.com/4113 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * rtos: support gdb_get_register_packet This patch adds support for p packet responses by targets configured with RTOS support. This change required moving to a rtos_reg struct, which is similar to struct reg used by targets, which resulted in needing to update each stacking with register numbers. This patch also allows targets with non-linear register numbers to function with RTOSes as well. Change-Id: I5b189d74110d6b6f2fa851a67ab0762ae6b1832f Signed-off-by: Steven Stallion <[email protected]> Reviewed-on: http://openocd.zylin.com/4121 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * gdb_server: add support for architecture element This change adds optional support for a target to report architecture information in the target description to GDB. This is needed by some GDB implementations to properly support remote target with custom behavior. More information on the architecture element can be found here: https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Target-Description-Format Change-Id: I57b19cae5ac3496256e4e5cc52cf6526ca5c322d Signed-off-by: Steven Stallion <[email protected]> Reviewed-on: http://openocd.zylin.com/4078 Tested-by: jenkins Reviewed-by: Antonio Borneo <[email protected]> Reviewed-by: Matthias Welwarsky <[email protected]> * jtag: make cmd_queue_scan_field_clone public This patch makes the cmd_queue_scan_field_clone function public. This permits targets to insert fields without affecting the submitted scan_field list. This will be used in an upcoming target implementation that needs to insert additional padding bits. Change-Id: I8fbd3b9b4e413432471f4f1444048932c8fa189e Signed-off-by: Steven Stallion <[email protected]> Reviewed-on: http://openocd.zylin.com/4082 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <[email protected]> * esirisc: support eSi-RISC targets eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven …
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HACKING

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The code review is intended to take as long as a week or two to allow
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maintainers and contributors who work on OpenOCD only in their spare
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time oportunity to perform a review and raise objections.
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time opportunity to perform a review and raise objections.
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With Gerrit much of the urgency of getting things committed has been
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removed as the work in progress is safely stored in Gerrit and

README

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openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
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-f target/ti_calypso.cfg
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openocd -f interface/stlink-v2-1.cfg -c "transport select hla_swd" \
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openocd -f interface/stlink.cfg -c "transport select hla_swd" \
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-f target/stm32l0.cfg
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After OpenOCD startup, connect GDB with
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-------------
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ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M, LS102x-SAP,
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Feroceon/Dragonite, DSP563xx, DSP5680xx, FA526, MIPS EJTAG, NDS32,
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XScale, Intel Quark.
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Feroceon/Dragonite, DSP563xx, DSP5680xx, EnSilica eSi-RISC, FA526, MIPS
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EJTAG, NDS32, XScale, Intel Quark.
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Flash drivers
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-------------
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ADUC702x, AT91SAM, ATH79, AVR, CFI, DSP5680xx, EFM32, EM357, FM3, FM4, Kinetis,
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LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPCSPIFI, Marvell QSPI,
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Milandr, NIIET, NuMicro, PIC32mx, PSoC4, PSoC5LP, SiM3x, Stellaris, STM32,
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STMSMI, STR7x, STR9x, nRF51; NAND controllers of AT91SAM9, LPC3180, LPC32xx,
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i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx, S3C6400, XMC1xxx, XMC4xxx.
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ADUC702x, AT91SAM, ATH79, AVR, CFI, DSP5680xx, EFM32, EM357, eSi-TSMC,
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FM3, FM4, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPCSPIFI,
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Marvell QSPI, Milandr, NIIET, NuMicro, PIC32mx, PSoC4, PSoC5LP, SiM3x,
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Stellaris, STM32, STMSMI, STR7x, STR9x, nRF51; NAND controllers of
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AT91SAM9, LPC3180, LPC32xx, i.MX31, MXC, NUC910, Orion/Kirkwood,
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S3C24xx, S3C6400, XMC1xxx, XMC4xxx.
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contrib/60-openocd.rules

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# Copy this file to /etc/udev/rules.d/
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# If rules fail to reload automatically, you can refresh udev rules
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# with the command "udevadm control --reload"
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ACTION!="add|change", GOTO="openocd_rules_end"
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SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end"

contrib/loaders/Makefile

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flash/fm4 \
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flash/kinetis_ke \
15+
flash/max32xxx \
1516
flash/xmc1xxx \
1617
debug/xscale
1718

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
BIN2C = ../../../../src/helper/bin2char.sh
2+
3+
CROSS_COMPILE ?= arm-none-eabi-
4+
AS = $(CROSS_COMPILE)as
5+
OBJCOPY = $(CROSS_COMPILE)objcopy
6+
7+
all: max32xxx.inc
8+
9+
%.elf: %.s
10+
$(AS) $< -o $@
11+
12+
%.bin: %.elf
13+
$(OBJCOPY) -Obinary $< $@
14+
15+
%.inc: %.bin
16+
$(BIN2C) < $< > $@
17+
18+
clean:
19+
-rm -f *.elf *.bin *.inc
Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
/* Autogenerated with ../../../../src/helper/bin2char.sh */
2+
0xdf,0xf8,0x44,0x40,0xd0,0xf8,0x00,0x80,0xb8,0xf1,0x00,0x0f,0x1a,0xd0,0x47,0x68,
3+
0x47,0x45,0xf7,0xd0,0x22,0x60,0x02,0xf1,0x04,0x02,0x57,0xf8,0x04,0x8b,0xc4,0xf8,
4+
0x30,0x80,0xa5,0x68,0x45,0xf0,0x01,0x05,0xa5,0x60,0xd4,0xf8,0x08,0x80,0x18,0xf0,
5+
0x01,0x0f,0xfa,0xd1,0x8f,0x42,0x28,0xbf,0x00,0xf1,0x08,0x07,0x47,0x60,0x01,0x3b,
6+
0x03,0xb1,0xdf,0xe7,0x00,0xbe,0x00,0xbf,0x00,0x00,0x00,0x40,
Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,70 @@
1+
/***************************************************************************
2+
* Copyright (C) 2016 by Maxim Integrated *
3+
* Kevin Gillespie <[email protected] *
4+
* *
5+
* This program is free software; you can redistribute it and/or modify *
6+
* it under the terms of the GNU General Public License as published by *
7+
* the Free Software Foundation; either version 2 of the License, or *
8+
* (at your option) any later version. *
9+
* *
10+
* This program is distributed in the hope that it will be useful, *
11+
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
12+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13+
* GNU General Public License for more details. *
14+
* *
15+
* You should have received a copy of the GNU General Public License *
16+
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
17+
***************************************************************************/
18+
19+
.text
20+
.syntax unified
21+
.cpu cortex-m3
22+
.thumb
23+
.thumb_func
24+
25+
/*
26+
* Params :
27+
* r0 = workarea start
28+
* r1 = workarea end
29+
* r2 = target address
30+
* r3 = count (32bit words)
31+
* r4 = pFLASH_CTRL_BASE
32+
*
33+
* Clobbered:
34+
* r5 = FLASHWRITECMD
35+
* r7 - rp
36+
* r8 - wp, tmp
37+
*/
38+
39+
write:
40+
41+
wait_fifo:
42+
ldr r8, [r0, #0] /* read wp */
43+
cmp r8, #0 /* abort if wp == 0 */
44+
beq exit
45+
ldr r7, [r0, #4] /* read rp */
46+
cmp r7, r8 /* wait until rp != wp */
47+
beq wait_fifo
48+
49+
mainloop:
50+
str r2, [r4, #0x00] /* FLSH_ADDR - write address */
51+
add r2, r2, #4 /* increment target address */
52+
ldr r8, [r7], #4
53+
str r8, [r4, #0x30] /* FLSH_DATA0 - write data */
54+
ldr r5, [r4, #0x08] /* FLSH_CN */
55+
orr r5, r5, #1
56+
str r5, [r4, #0x08] /* FLSH_CN - enable write */
57+
busy:
58+
ldr r8, [r4, #0x08] /* FLSH_CN */
59+
tst r8, #1
60+
bne busy
61+
62+
cmp r7, r1 /* wrap rp at end of buffer */
63+
it cs
64+
addcs r7, r0, #8 /* skip loader args */
65+
str r7, [r0, #4] /* store rp */
66+
subs r3, r3, #1 /* decrement word count */
67+
cbz r3, exit /* loop if not done */
68+
b wait_fifo
69+
exit:
70+
bkpt

contrib/rtos-helpers/uCOS-III-openocd.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@
33
* impossible to determine the appropriate offsets within the structure
44
* unaided. A priori knowledge of offsets based on os_dbg.c is tied to a
55
* specific release and thusly, brittle. The constants defined below
6-
* provide the neccessary information OpenOCD needs to provide support
7-
* in the most robust manner possible.
6+
* provide the necessary information OpenOCD needs to provide support in
7+
* the most robust manner possible.
88
*
99
* This file should be linked along with the project to enable RTOS
1010
* support for uC/OS-III.

doc/openocd.texi

Lines changed: 115 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2114,6 +2114,7 @@ In such cases, just specify the relevant port number as "disabled".
21142114
If you disable all access through TCP/IP, you will need to
21152115
use the command line @option{-pipe} option.
21162116

2117+
@anchor{gdb_port}
21172118
@deffn {Command} gdb_port [number]
21182119
@cindex GDB server
21192120
Normally gdb listens to a TCP/IP port, but GDB can also
@@ -2139,11 +2140,15 @@ The GDB port for the first target will be the base port, the
21392140
second target will listen on gdb_port + 1, and so on.
21402141
When not specified during the configuration stage,
21412142
the port @var{number} defaults to 3333.
2143+
When @var{number} is not a numeric value, incrementing it to compute
2144+
the next port number does not work. In this case, specify the proper
2145+
@var{number} for each target by using the option @code{-gdb-port} of the
2146+
commands @command{target create} or @command{$target_name configure}.
2147+
@xref{gdbportoverride,,option -gdb-port}.
21422148

21432149
Note: when using "gdb_port pipe", increasing the default remote timeout in
21442150
gdb (with 'set remotetimeout') is recommended. An insufficient timeout may
21452151
cause initialization to fail with "Unknown remote qXfer reply: OK".
2146-
21472152
@end deffn
21482153

21492154
@deffn {Command} tcl_port [number]
@@ -4270,6 +4275,8 @@ compact Thumb2 instruction set.
42704275
@item @code{dragonite} -- resembles arm966e
42714276
@item @code{dsp563xx} -- implements Freescale's 24-bit DSP.
42724277
(Support for this is still incomplete.)
4278+
@item @code{esirisc} -- this is an EnSilica eSi-RISC core.
4279+
The current implementation supports eSi-32xx cores.
42734280
@item @code{fa526} -- resembles arm920 (w/o Thumb)
42744281
@item @code{feroceon} -- resembles arm926
42754282
@item @code{mips_m4k} -- a MIPS core
@@ -4458,6 +4465,13 @@ to the target. Currently, only the @code{aarch64} target makes use of this optio
44584465
where it is a mandatory configuration for the target run control.
44594466
@xref{armcrosstrigger,,ARM Cross-Trigger Interface},
44604467
for instruction on how to declare and control a CTI instance.
4468+
4469+
@anchor{gdbportoverride}
4470+
@item @code{-gdb-port} @var{number} -- see command @command{gdb_port} for the
4471+
possible values of the parameter @var{number}, which are not only numeric values.
4472+
Use this option to override, for this target only, the global parameter set with
4473+
command @command{gdb_port}.
4474+
@xref{gdb_port,,command gdb_port}.
44614475
@end itemize
44624476
@end deffn
44634477

@@ -5635,6 +5649,27 @@ Note that in order for this command to take effect, the target needs to be reset
56355649
supported.}
56365650
@end deffn
56375651

5652+
@deffn {Flash Driver} esirisc
5653+
Members of the eSi-RISC family may optionally include internal flash programmed
5654+
via the eSi-TSMC Flash interface. Additional parameters are required to
5655+
configure the driver: @option{cfg_address} is the base address of the
5656+
configuration register interface, @option{clock_hz} is the expected clock
5657+
frequency, and @option{wait_states} is the number of configured read wait states.
5658+
5659+
@example
5660+
flash bank $_FLASHNAME esirisc base_address size_bytes 0 0 $_TARGETNAME cfg_address clock_hz wait_states
5661+
@end example
5662+
5663+
@deffn Command {esirisc_flash mass_erase} (bank_id)
5664+
Erases all pages in data memory for the bank identified by @option{bank_id}.
5665+
@end deffn
5666+
5667+
@deffn Command {esirisc_flash ref_erase} (bank_id)
5668+
Erases the reference cell for the bank identified by @option{bank_id}. This is
5669+
an uncommon operation.
5670+
@end deffn
5671+
@end deffn
5672+
56385673
@deffn {Flash Driver} fm3
56395674
All members of the FM3 microcontroller family from Fujitsu
56405675
include internal flash and use ARM Cortex-M3 cores.
@@ -6394,30 +6429,38 @@ flash bank $_FLASHNAME stm32f1x 0x08080000 0 0 0 $_TARGETNAME
63946429
Some stm32f1x-specific commands are defined:
63956430

63966431
@deffn Command {stm32f1x lock} num
6397-
Locks the entire stm32 device.
6432+
Locks the entire stm32 device against reading.
63986433
The @var{num} parameter is a value shown by @command{flash banks}.
63996434
@end deffn
64006435

64016436
@deffn Command {stm32f1x unlock} num
6402-
Unlocks the entire stm32 device.
6437+
Unlocks the entire stm32 device for reading. This command will cause
6438+
a mass erase of the entire stm32 device if previously locked.
64036439
The @var{num} parameter is a value shown by @command{flash banks}.
64046440
@end deffn
64056441

64066442
@deffn Command {stm32f1x mass_erase} num
6407-
Mass erases the entire stm32f1x device.
6443+
Mass erases the entire stm32 device.
64086444
The @var{num} parameter is a value shown by @command{flash banks}.
64096445
@end deffn
64106446

64116447
@deffn Command {stm32f1x options_read} num
6412-
Read and display the stm32 option bytes written by
6413-
the @command{stm32f1x options_write} command.
6448+
Reads and displays active stm32 option bytes loaded during POR
6449+
or upon executing the @command{stm32f1x options_load} command.
64146450
The @var{num} parameter is a value shown by @command{flash banks}.
64156451
@end deffn
64166452

64176453
@deffn Command {stm32f1x options_write} num (@option{SWWDG}|@option{HWWDG}) (@option{RSTSTNDBY}|@option{NORSTSTNDBY}) (@option{RSTSTOP}|@option{NORSTSTOP})
64186454
Writes the stm32 option byte with the specified values.
64196455
The @var{num} parameter is a value shown by @command{flash banks}.
64206456
@end deffn
6457+
6458+
@deffn Command {stm32f1x options_load} num
6459+
Generates a special kind of reset to re-load the stm32 option bytes written
6460+
by the @command{stm32f1x options_write} or @command{flash protect} commands
6461+
without having to power cycle the target. Not applicable to stm32f1x devices.
6462+
The @var{num} parameter is a value shown by @command{flash banks}.
6463+
@end deffn
64216464
@end deffn
64226465

64236466
@deffn {Flash Driver} stm32f2x
@@ -6584,6 +6627,42 @@ The @var{num} parameter is a value shown by @command{flash banks}.
65846627
Mass erases the entire stm32l4x device.
65856628
The @var{num} parameter is a value shown by @command{flash banks}.
65866629
@end deffn
6630+
6631+
@deffn Command {stm32l4x option_read} num reg_offset
6632+
Reads an option byte register from the stm32l4x device.
6633+
The @var{num} parameter is a value shown by @command{flash banks}, @var{reg_offset}
6634+
is the register offset of the Option byte to read.
6635+
6636+
For example to read the FLASH_OPTR register:
6637+
@example
6638+
stm32l4x option_read 0 0x20
6639+
# Option Register: <0x40022020> = 0xffeff8aa
6640+
@end example
6641+
6642+
The above example will read out the FLASH_OPTR register which contains the RDP
6643+
option byte, Watchdog configuration, BOR level etc.
6644+
@end deffn
6645+
6646+
@deffn Command {stm32l4x option_write} num reg_offset reg_mask
6647+
Write an option byte register of the stm32l4x device.
6648+
The @var{num} parameter is a value shown by @command{flash banks}, @var{reg_offset}
6649+
is the register offset of the Option byte to write, and @var{reg_mask} is the mask
6650+
to apply when writing the register (only bits with a '1' will be touched).
6651+
6652+
For example to write the WRP1AR option bytes:
6653+
@example
6654+
stm32l4x option_write 0 0x28 0x00FF0000 0x00FF00FF
6655+
@end example
6656+
6657+
The above example will write the WRP1AR option register configuring the Write protection
6658+
Area A for bank 1. The above example set WRP1AR_END=255, WRP1AR_START=0.
6659+
This will effectively write protect all sectors in flash bank 1.
6660+
@end deffn
6661+
6662+
@deffn Command {stm32l4x option_load} num
6663+
Forces a re-load of the option byte registers. Will cause a reset of the device.
6664+
The @var{num} parameter is a value shown by @command{flash banks}.
6665+
@end deffn
65876666
@end deffn
65886667

65896668
@deffn {Flash Driver} str7x
@@ -8687,6 +8766,12 @@ Selects whether interrupts will be processed when single stepping
86878766
configure l2x cache
86888767
@end deffn
86898768

8769+
@deffn Command {cortex_a mmu dump} [@option{0}|@option{1}|@option{addr} address [@option{num_entries}]]
8770+
Dump the MMU translation table from TTB0 or TTB1 register, or from physical
8771+
memory location @var{address}. When dumping the table from @var{address}, print at most
8772+
@var{num_entries} page table entries. @var{num_entries} is optional, if omitted, the maximum
8773+
possible (4096) entries are printed.
8774+
@end deffn
86908775

86918776
@subsection ARMv7-R specific commands
86928777
@cindex Cortex-R
@@ -8777,7 +8862,7 @@ baud with our custom divisor to get 12MHz)
87778862
@item @code{itmdump -f /dev/ttyUSB1 -d1}
87788863
@item OpenOCD invocation line:
87798864
@example
8780-
openocd -f interface/stlink-v2-1.cfg \
8865+
openocd -f interface/stlink.cfg \
87818866
-c "transport select hla_swd" \
87828867
-f target/stm32l1.cfg \
87838868
-c "tpiu config external uart off 24000000 12000000"
@@ -8885,6 +8970,29 @@ Selects whether interrupts will be processed when single stepping. The default c
88858970
@option{on}.
88868971
@end deffn
88878972

8973+
@section EnSilica eSi-RISC Architecture
8974+
8975+
eSi-RISC is a highly configurable microprocessor architecture for embedded systems
8976+
provided by EnSilica. (See: @url{http://www.ensilica.com/risc-ip/}.)
8977+
8978+
@subsection esirisc specific commands
8979+
@deffn Command {esirisc cache_arch} (@option{harvard}|@option{von_neumann})
8980+
Configure the caching architecture. Targets with the @code{UNIFIED_ADDRESS_SPACE}
8981+
option disabled employ a Harvard architecture. By default, @option{von_neumann} is assumed.
8982+
@end deffn
8983+
8984+
@deffn Command {esirisc flush_caches}
8985+
Flush instruction and data caches. This command requires that the target is halted
8986+
when the command is issued and configured with an instruction or data cache.
8987+
@end deffn
8988+
8989+
@deffn Command {esirisc hwdc} (@option{all}|@option{none}|mask ...)
8990+
Configure hardware debug control. The HWDC register controls which exceptions return
8991+
control back to the debugger. Possible masks are @option{all}, @option{none},
8992+
@option{reset}, @option{interrupt}, @option{syscall}, @option{error}, and @option{debug}.
8993+
By default, @option{reset}, @option{error}, and @option{debug} are enabled.
8994+
@end deffn
8995+
88888996
@section Intel Architecture
88898997

88908998
Intel Quark X10xx is the first product in the Quark family of SoCs. It is an IA-32

src/flash/nor/Makefile.am

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ NOR_DRIVERS = \
2525
%D%/dsp5680xx_flash.c \
2626
%D%/efm32.c \
2727
%D%/em357.c \
28+
%D%/esirisc_flash.c \
2829
%D%/faux.c \
2930
%D%/fespi.c \
3031
%D%/fm3.c \
@@ -36,6 +37,7 @@ NOR_DRIVERS = \
3637
%D%/lpc288x.c \
3738
%D%/lpc2900.c \
3839
%D%/lpcspifi.c \
40+
%D%/max32xxx.c \
3941
%D%/mdr.c \
4042
%D%/msp432.c \
4143
%D%/mrvlqspi.c \

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