Skip to content

Commit 33d1289

Browse files
[ACT] [CTG] [ISAC] Add support for Zcf and Zcd extension (#497)
* Updated Zcf and Zcd test case * Updated Zcf and Zcd instruction support with respect to riscv-ctg and riscv-isac --------- Signed-off-by: anuani21 <[email protected]> Co-authored-by: James Shi <[email protected]>
1 parent cd94912 commit 33d1289

File tree

16 files changed

+2349
-6
lines changed

16 files changed

+2349
-6
lines changed

coverage/cgfs_fext/RV32Zcd/fld.cgf

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
c.fld:
2+
config:
3+
- check ISA:=regex(.*I.*F.*D.*C.*)
4+
mnemonics:
5+
c.fld: 0
6+
rs1:
7+
<<: *c_regs
8+
rd:
9+
<<: *c_fregs
10+
op_comb:
11+
'rs1 != rd': 0
12+
val_comb:
13+
'imm_val > 0 and fcsr == 0': 0
14+
'imm_val == 0 and fcsr == 0': 0
15+
abstract_comb:
16+
'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
17+
'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
18+
'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
19+
20+
c.fsd:
21+
config:
22+
- check ISA:=regex(.*I.*F.*D.*C.*)
23+
opcode:
24+
c.fsd: 0
25+
rs1:
26+
<<: *c_regs
27+
rs2:
28+
<<: *c_fregs
29+
op_comb:
30+
'rs1 != rs2': 0
31+
val_comb:
32+
'imm_val > 0': 0
33+
'imm_val == 0': 0
34+
abstract_comb:
35+
'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
36+
'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
37+
'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
38+
39+
c.fldsp:
40+
config:
41+
- check ISA:=regex(.*I.*F.*D.*C.*)
42+
opcode:
43+
c.fldsp: 0
44+
rd:
45+
<<: *all_fregs
46+
val_comb:
47+
'imm_val > 0': 0
48+
'imm_val == 0': 0
49+
abstract_comb:
50+
'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
51+
'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
52+
'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0
53+
54+
c.fsdsp:
55+
config:
56+
- check ISA:=regex(.*I.*F.*D.*C.*)
57+
opcode:
58+
c.fsdsp: 0
59+
rs2:
60+
<<: *all_fregs
61+
val_comb:
62+
'imm_val > 0': 0
63+
'imm_val == 0': 0
64+
abstract_comb:
65+
'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
66+
'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
67+
'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0

coverage/cgfs_fext/RV32Zcf/flw.cgf

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,65 @@
1+
c.flw:
2+
config:
3+
- check ISA:=regex(.*I.*F.*C.*)
4+
mnemonics:
5+
c.flw: 0
6+
rs1:
7+
<<: *c_regs
8+
rd:
9+
<<: *c_fregs
10+
val_comb:
11+
'imm_val > 0 and fcsr == 0': 0
12+
'imm_val == 0 and fcsr == 0': 0
13+
abstract_comb:
14+
'walking_ones("imm_val",5,False, scale_func = lambda x: x*4)': 0
15+
'walking_zeros("imm_val",5,False, scale_func = lambda x: x*4)': 0
16+
'alternate("imm_val",5, False,scale_func = lambda x: x*4)': 0
17+
18+
c.flwsp:
19+
config:
20+
- check ISA:=regex(.*I.*F.*C.*)
21+
opcode:
22+
c.flwsp: 0
23+
rd:
24+
<<: *c_fregs
25+
val_comb:
26+
'imm_val > 0 and fcsr == 0': 0
27+
'imm_val == 0 and fcsr == 0': 0
28+
abstract_comb:
29+
'walking_ones("imm_val",6,False, scale_func = lambda x: x*4)': 0
30+
'walking_zeros("imm_val",6,False, scale_func = lambda x: x*4)': 0
31+
'alternate("imm_val",6, False,scale_func = lambda x: x*4)': 0
32+
33+
c.fsw:
34+
config:
35+
- check ISA:=regex(.*I.*F.*C.*)
36+
opcode:
37+
c.fsw: 0
38+
rs1:
39+
<<: *c_regs
40+
rs2:
41+
<<: *c_fregs
42+
op_comb:
43+
'rs1 != rs2': 0
44+
val_comb:
45+
'imm_val > 0': 0
46+
'imm_val == 0': 0
47+
abstract_comb:
48+
'walking_ones("imm_val",5,False, scale_func = lambda x: x*4)': 0
49+
'walking_zeros("imm_val",5,False, scale_func = lambda x: x*4)': 0
50+
'alternate("imm_val",5, False,scale_func = lambda x: x*4)': 0
51+
52+
c.fswsp:
53+
config:
54+
- check ISA:=regex(.*I.*F.*C.*)
55+
opcode:
56+
c.fswsp: 0
57+
rs2:
58+
<<: *c_fregs
59+
val_comb:
60+
'imm_val > 0': 0
61+
'imm_val == 0': 0
62+
abstract_comb:
63+
'walking_ones("imm_val",6,False, scale_func = lambda x: x*4)': 0
64+
'walking_zeros("imm_val",6,False, scale_func = lambda x: x*4)': 0
65+
'alternate("imm_val",6, False,scale_func = lambda x: x*4)': 0

coverage/cgfs_fext/RV64Zcd/fld.cgf

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,67 @@
1+
c.fld:
2+
config:
3+
- check ISA:=regex(.*I.*F.*D.*C.*)
4+
mnemonics:
5+
c.fld: 0
6+
rs1:
7+
<<: *c_regs
8+
rd:
9+
<<: *c_fregs
10+
op_comb:
11+
'rs1 != rd': 0
12+
val_comb:
13+
'imm_val > 0 and fcsr == 0': 0
14+
'imm_val == 0 and fcsr == 0': 0
15+
abstract_comb:
16+
'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
17+
'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
18+
'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
19+
20+
c.fsd:
21+
config:
22+
- check ISA:=regex(.*I.*F.*D.*C.*)
23+
opcode:
24+
c.fsd: 0
25+
rs1:
26+
<<: *c_regs
27+
rs2:
28+
<<: *c_fregs
29+
op_comb:
30+
'rs1 != rs2': 0
31+
val_comb:
32+
'imm_val > 0': 0
33+
'imm_val == 0': 0
34+
abstract_comb:
35+
'walking_ones("imm_val",5,False, scale_func = lambda x: x*8)': 0
36+
'walking_zeros("imm_val",5,False, scale_func = lambda x: x*8)': 0
37+
'alternate("imm_val",5, False,scale_func = lambda x: x*8)': 0
38+
39+
c.fldsp:
40+
config:
41+
- check ISA:=regex(.*I.*F.*D.*C.*)
42+
opcode:
43+
c.fldsp: 0
44+
rd:
45+
<<: *all_fregs
46+
val_comb:
47+
'imm_val > 0': 0
48+
'imm_val == 0': 0
49+
abstract_comb:
50+
'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
51+
'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
52+
'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0
53+
54+
c.fsdsp:
55+
config:
56+
- check ISA:=regex(.*I.*F.*D.*C.*)
57+
opcode:
58+
c.fsdsp: 0
59+
rs2:
60+
<<: *all_fregs
61+
val_comb:
62+
'imm_val > 0': 0
63+
'imm_val == 0': 0
64+
abstract_comb:
65+
'walking_ones("imm_val",6,False, scale_func = lambda x: x*8)': 0
66+
'walking_zeros("imm_val",6,False, scale_func = lambda x: x*8)': 0
67+
'alternate("imm_val",6, False,scale_func = lambda x: x*8)': 0

coverage/dataset.cgf

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -180,6 +180,16 @@ datasets:
180180
x13: 0
181181
x14: 0
182182
x15: 0
183+
184+
c_fregs: &c_fregs
185+
f8: 0
186+
f9: 0
187+
f10: 0
188+
f11: 0
189+
f12: 0
190+
f13: 0
191+
f14: 0
192+
f15: 0
183193

184194
all_regs_mx2: &all_regs_mx2
185195
x1: 0

riscv-ctg/riscv_ctg/data/imc.yaml

Lines changed: 175 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1890,3 +1890,178 @@ c.jalr:
18901890
// opcode: c.jalr; op1:$rs1
18911891
TEST_CJALR_OP($testreg, $rs1, $swreg, $offset)
18921892
1893+
c.flw:
1894+
sig:
1895+
stride: 1
1896+
sz: 'XLEN/8'
1897+
rs1_op_data: *c_regs
1898+
rd_op_data: *c_fregs
1899+
xlen: [32]
1900+
std_op:
1901+
isa:
1902+
- IF_Zcf
1903+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
1904+
formattype: 'clformat'
1905+
ea_align_data: '[0,1,2,3]'
1906+
rs1_val_data: '[0]'
1907+
imm_val_data: '[x*4 for x in gen_usign_dataset(5)]'
1908+
template: |-
1909+
// $comment
1910+
// opcode: $inst; op1:$rs1; dest:$rd; immval:$imm_val; align:$ea_align; flagreg:$flagreg; fcsr: $fcsr
1911+
TEST_LOAD_F($swreg,$testreg,$fcsr,$rs1,$rd,$imm_val,$inst,$ea_align,$flagreg)
1912+
1913+
c.flwsp:
1914+
sig:
1915+
stride: 1
1916+
sz: 'XLEN/8'
1917+
rd_op_data: *c_fregs
1918+
xlen: [32]
1919+
std_op:
1920+
isa:
1921+
- IF_Zcf
1922+
formattype: 'ciformat'
1923+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
1924+
ea_align_data: '[0,1,2,3]'
1925+
imm_val_data: '[x*4 for x in gen_usign_dataset(6)]'
1926+
template: |-
1927+
// $comment
1928+
// opcode: $inst op1:$rs1; dest:$rd; immval:$imm_val; align:$ea_align; flagreg:$flagreg; fcsr: $fcsr
1929+
TEST_LOAD_F($swreg,$testreg,$fcsr,$rs1,$rd,$imm_val,$inst,$ea_align,$flagreg)
1930+
1931+
c.fsw:
1932+
sig:
1933+
stride: 1
1934+
sz: 'XLEN/8'
1935+
xlen: [32]
1936+
rs1_op_data: *c_regs
1937+
rs2_op_data: *c_fregs
1938+
std_op:
1939+
isa:
1940+
- IF_Zcf
1941+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
1942+
formattype: 'csformat'
1943+
ea_align_data: '[0,1,2,3]'
1944+
rs1_val_data: '[0]'
1945+
rs2_val_data: 'gen_sign_dataset(xlen)'
1946+
imm_val_data: '[x*4 for x in gen_usign_dataset(5)]'
1947+
template: |-
1948+
// $comment
1949+
/* opcode: $inst; op1:$rs1; op2:$rs2; op2val:$rs2_val; immval:$imm_val; align:$ea_align; flagreg:$flagreg;
1950+
valreg: $valaddr_reg; valoffset: $val_offset
1951+
*/
1952+
TEST_STORE_F($swreg,$testreg,$fcsr,$rs1,$rs2,$imm_val,$offset,$inst,$ea_align,$flagreg,$valaddr_reg, $val_offset)
1953+
1954+
c.fswsp:
1955+
sig:
1956+
stride: 1
1957+
sz: 'XLEN/8'
1958+
rs2_op_data: *c_fregs
1959+
xlen: [32]
1960+
std_op:
1961+
isa:
1962+
- IF_Zcf
1963+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
1964+
formattype: 'cssformat'
1965+
ea_align_data: '[0,1,2,3]'
1966+
rs2_val_data: 'gen_sign_dataset(xlen)'
1967+
imm_val_data: '[x*4 for x in gen_usign_dataset(6)]'
1968+
template: |-
1969+
// $comment
1970+
/* opcode: $inst; op1:$rs1; op2:$rs2; op2val:$rs2_val; immval:$imm_val; align:$ea_align; flagreg:$flagreg;
1971+
valreg: $valaddr_reg; valoffset: $val_offset
1972+
*/
1973+
TEST_STORE_F($swreg,$testreg,$fcsr,$rs1,$rs2,$imm_val,$offset,$inst,$ea_align,$flagreg,$valaddr_reg, $val_offset)
1974+
1975+
c.fld:
1976+
sig:
1977+
stride: 2
1978+
sz: 'SIGALIGN'
1979+
val:
1980+
stride: 1
1981+
sz: '8'
1982+
val_template: "''"
1983+
load_instr: "fld"
1984+
rs1_op_data: *c_regs
1985+
rd_op_data: *c_fregs
1986+
xlen: [32,64]
1987+
std_op:
1988+
isa:
1989+
- IFD_Zcd
1990+
formattype: 'clformat'
1991+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
1992+
ea_align_data: '[0,1,2,3]'
1993+
imm_val_data: '[x*8 for x in gen_usign_dataset(5)]'
1994+
template: |-
1995+
// $comment
1996+
// opcode: $inst; op1:$rs1; dest:$rd; immval:$imm_val; align:$ea_align; flagreg:$flagreg
1997+
TEST_LOAD_F($swreg,$testreg,$fcsr,$rs1,$rd,$imm_val,$inst,$ea_align,$flagreg)
1998+
1999+
c.fldsp:
2000+
sig:
2001+
stride: 2
2002+
sz: 'SIGALIGN'
2003+
rd_op_data: *c_fregs
2004+
xlen: [32,64]
2005+
std_op:
2006+
isa:
2007+
- IFD_Zcd
2008+
formattype: 'ciformat'
2009+
imm_val_data: '[x*8 for x in gen_usign_dataset(6)]'
2010+
template: |-
2011+
// $comment
2012+
// opcode: $inst; op1:x2; dest:$rd; immval:$imm_val; align:$ea_align; flagreg:x4
2013+
TEST_LOAD_F($swreg,$testreg,$fcsr,x2,$rd,$imm_val,$inst,$ea_align,x4)
2014+
2015+
2016+
c.fsd:
2017+
sig:
2018+
stride: 2
2019+
sz: 'SIGALIGN'
2020+
val:
2021+
stride: 1
2022+
sz: 'FLEN/8'
2023+
val_template: "''"
2024+
load_instr: "FLREG"
2025+
rs1_op_data: *c_regs
2026+
rs2_op_data: *c_fregs
2027+
xlen: [32,64]
2028+
std_op:
2029+
isa:
2030+
- IFD_Zcd
2031+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
2032+
formattype: 'csformat'
2033+
ea_align_data: '[0,1,2,3]'
2034+
rs2_val_data: 'gen_sign_dataset(xlen)'
2035+
imm_val_data: '[x*8 for x in gen_usign_dataset(5)]'
2036+
template: |-
2037+
// $comment
2038+
/* opcode: $inst; op1:$rs1; op2:$rs2; op2val:$rs2_val; immval:$imm_val; align:$ea_align; flagreg:$flagreg;
2039+
valreg: $valaddr_reg; valoffset: $val_offset
2040+
*/
2041+
TEST_STORE_F($swreg,$testreg,$fcsr,$rs1,$rs2,$imm_val,$offset,$inst,$ea_align,$flagreg,$valaddr_reg, $val_offset)
2042+
2043+
c.fsdsp:
2044+
sig:
2045+
stride: 2
2046+
sz: 'SIGALIGN'
2047+
val:
2048+
stride: 1
2049+
sz: 'FLEN/8'
2050+
val_template: "''"
2051+
load_instr: "FLREG"
2052+
rs2_op_data: *c_fregs
2053+
xlen: [32,64]
2054+
std_op:
2055+
isa:
2056+
- IFD_Zcd
2057+
fcsr_data: '[x<<5|y for x,y in itertools.product([0,1,2,3,4],range(0,2**5))]'
2058+
formattype: 'cssformat'
2059+
ea_align_data: '[0,1,2,3]'
2060+
rs2_val_data: 'gen_sign_dataset(xlen)'
2061+
imm_val_data: '[x*8 for x in gen_usign_dataset(6)]'
2062+
template: |-
2063+
// $comment
2064+
/* opcode: $inst; op1:$rs1; op2:$rs2; op2val:$rs2_val; immval:$imm_val; align:$ea_align; flagreg:$flagreg;
2065+
valreg: $valaddr_reg; valoffset: $val_offset
2066+
*/
2067+
TEST_STORE_F($swreg,$testreg,$fcsr,$rs1,$rs2,$imm_val,$offset,$inst,$ea_align,$flagreg,$valaddr_reg, $val_offset)

0 commit comments

Comments
 (0)