Skip to content

Commit 6225031

Browse files
crypto scalar instructions support (#520)
Co-authored-by: Umer Shahid <[email protected]>
1 parent db631b2 commit 6225031

File tree

3 files changed

+22
-24
lines changed

3 files changed

+22
-24
lines changed

riscv-isac/riscv_isac/InstructionObject.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
'aes32esmi', 'aes32esi', 'aes32dsmi', 'aes32dsi','bclr','bext','binv',\
2626
'bset','zext.h','sext.h','sext.b','zext.b','zext.w','minu','maxu','orc.b','add.uw','sh1add.uw',\
2727
'sh2add.uw','sh3add.uw','slli.uw','clz','clzw','ctz','ctzw','cpop','cpopw','rev8',\
28-
'bclri','bexti','binvi','bseti','fcvt.d.wu','fcvt.s.wu','fcvt.d.lu','fcvt.s.lu','c.flwsp',\
28+
'bclri','bexti','binvi','bseti','xperm4','xperm8','zip','unzip','gorci','fcvt.d.wu','fcvt.s.wu','fcvt.d.lu','fcvt.s.lu','c.flwsp',\
2929
'c.not', 'c.sext.b','c.sext.h','c.zext.b','c.zext.h','c.zext.w','sc.w','lr.w','sc.d','lr.d']
3030
unsgn_rs2 = ['bgeu', 'bltu', 'sltiu', 'sltu', 'sll', 'srl', 'sra','mulhu',\
3131
'mulhsu','divu','remu','divuw','remuw','aes64ds','aes64dsm','aes64es',\

riscv-isac/riscv_isac/data/rvopcodesdecoder.py

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -452,6 +452,10 @@ def decode(self, instrObj_temp):
452452
temp_instrobj.rm = int(get_arg_val(arg)(mcode), 2)
453453
if arg == 'csr':
454454
temp_instrobj.imm = int(get_arg_val(arg)(mcode), 2)
455+
if arg == 'bs':
456+
temp_instrobj.imm = int(get_arg_val(arg)(mcode), 2)
457+
if arg == 'rnum':
458+
temp_instrobj.imm = int(get_arg_val(arg)(mcode), 2)
455459
if arg.find('imm') != -1:
456460
if arg in ['imm12', 'imm20', 'zimm', 'imm2', 'imm3', 'imm4', 'imm5']:
457461
imm = get_arg_val(arg)(mcode)

riscv-isac/riscv_isac/plugins/internaldecoder.py

Lines changed: 17 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -598,10 +598,10 @@ def arithi_ops(self, instrObj):
598598

599599
if funct3 == 0b001:
600600
if funct7 == 0b0000100:
601-
if instrObj.arch == 'rv32':
602-
instrObj.instr_name = 'zip'
603-
instrObj.rs1= rs1
604-
instrObj.rd = rd
601+
if self.arch == 'rv32':
602+
instrObj.instr_name = 'zip'
603+
instrObj.rs1= rs1
604+
instrObj.rd = rd
605605
elif sbi == 0b0100100 or sbi == 0b010010:
606606
instrObj.rs1 = rs1
607607
instrObj.rd = rd
@@ -720,7 +720,7 @@ def arithi_ops(self, instrObj):
720720

721721
if funct3 == 0b101:
722722
if funct7 == 0b0000100:
723-
if instrObj.arch == 'rv32':
723+
if self.arch == 'rv32':
724724
instrObj.instr_name = 'unzip'
725725
instrObj.rs1= rs1
726726
instrObj.rd = rd
@@ -1210,15 +1210,10 @@ def arith_ops(self, instrObj):
12101210
instrObj.rs2 = rs2
12111211
instrObj.rd = rd
12121212
elif funct7 == 0b0000100:
1213-
if rs2[0] == 0b0:
1214-
instrObj.instr_name = 'zext.h'
1215-
instrObj.rs1 = rs1
1216-
instrObj.rd = rd
1217-
else:
1218-
instrObj.instr_name = 'pack'
1219-
instrObj.rs1 = rs1
1220-
instrObj.rs2 = rs2
1221-
instrObj.rd = rd
1213+
instrObj.instr_name = 'pack'
1214+
instrObj.rs1 = rs1
1215+
instrObj.rs2 = rs2
1216+
instrObj.rd = rd
12221217
elif funct7 == 0b0000101:
12231218
instrObj.instr_name = 'min'
12241219
instrObj.rs1 = rs1
@@ -1499,15 +1494,14 @@ def rv64i_arith_ops(self, instrObj):
14991494

15001495
if funct3 == 0b100:
15011496
if funct7 == 0b0000100:
1502-
if rs2[0] == 0b0:
1503-
instrObj.instr_name = 'zext.h'
1504-
instrObj.rs1 = rs1
1505-
instrObj.rd = rd
1506-
else:
1507-
instrObj.instr_name = 'packw'
1508-
instrObj.rs1 = rs1
1509-
instrObj.rs2 = rs2
1510-
instrObj.rd = rd
1497+
# packw and zext.h have same opcode, func3, funct7 only diffrence is in rs2 value
1498+
# for zext.h rs2 is always 0, if packw instruction is used with x0 as rs2
1499+
# then cannot distinguish from each other, hence using isa to differentiate.
1500+
# zext.h is part of Zbb, packw is part of Zbkb
1501+
instrObj.instr_name = 'packw'
1502+
instrObj.rs1 = rs1
1503+
instrObj.rs2 = rs2
1504+
instrObj.rd = rd
15111505
elif funct7 == 0b0010000:
15121506
instrObj.instr_name = 'sh2add.uw'
15131507
instrObj.rs1 = rs1

0 commit comments

Comments
 (0)