Use assembler relocation functions in the psedoinstructions table

Author: hirooih

riscv-asm.md

@@ -608,14 +608,14 @@ fail_msg:
 
 Pseudoinstruction            | Base Instruction(s)                                           | Meaning   | Comment
 :----------------------------|:--------------------------------------------------------------|:----------|:--------|
-la rd, symbol                | auipc rd, symbol[31:12]; addi rd, rd, symbol[11:0]            | Load address | With `.option nopic` (Default)
-la rd, symbol                | auipc rd, symbol@GOT[31:12]; l{w\|d} rd, symbol@GOT[11:0]\(rd\) | Load address | With `.option pic`
-lla rd, symbol               | auipc rd, symbol[31:12]; addi rd, rd, symbol[11:0]            | Load local address
-lga rd, symbol               | auipc rd, symbol@GOT[31:12]; l{w\|d} rd, symbol@GOT[11:0]\(rd\) | Load global address
-l{b\|h\|w\|d} rd, symbol     | auipc rd, symbol[31:12]; l{b\|h\|w\|d} rd, symbol[11:0]\(rd\) | Load global
-s{b\|h\|w\|d} rd, symbol, rt | auipc rt, symbol[31:12]; s{b\|h\|w\|d} rd, symbol[11:0]\(rt\) | Store global
-fl{w\|d} rd, symbol, rt      | auipc rt, symbol[31:12]; fl{w\|d} rd, symbol[11:0]\(rt\)      | Floating-point load global
-fs{w\|d} rd, symbol, rt      | auipc rt, symbol[31:12]; fs{w\|d} rd, symbol[11:0]\(rt\)      | Floating-point store global
+la rd, symbol                | 1: auipc rd, %pcrel_hi(symbol); addi rd, rd, %pcrel_lo(1b)          | Load address | With `.option nopic` (Default)
+la rd, symbol                | 1: auipc rd, %got_pcrel_hi(symbol); l{w\|d} rd, %pcrel_lo(1b)(rd)   | Load address | With `.option pic`
+lla rd, symbol               | 1: auipc rd, %pcrel_hi(symbol); addi rd, rd, %pcrel_lo(1b)          | Load local address
+lga rd, symbol               | 1: auipc rd, %got_pcrel_hi(symbol); l{w\|d} rd, %pcrel_lo(1b)(rd)   | Load global address
+l{b\|h\|w\|d} rd, symbol     | 1: auipc rd, %pcrel_hi(symbol); l{b\|h\|w\|d} rd, %pcrel_lo(1b)(rd) | Load global
+s{b\|h\|w\|d} rd, symbol, rt | 1: auipc rt, %pcrel_hi(symbol); s{b\|h\|w\|d} rd, %pcrel_lo(1b)(rt) | Store global
+fl{w\|d} rd, symbol, rt      | 1: auipc rt, %pcrel_hi(symbol); fl{w\|d} rd, %pcrel_lo(1b)(rt)      | Floating-point load global
+fs{w\|d} rd, symbol, rt      | 1: auipc rt, %pcrel_hi(symbol); fs{w\|d} rd, %pcrel_lo(1b)(rt)      | Floating-point store global
 nop                          | addi x0, x0, 0                                                | No operation
 li rd, immediate             | *Myriad sequences*                                            | Load immediate
 mv rd, rs                    | addi rd, rs, 0                                                | Copy register
@@ -653,8 +653,8 @@ jal offset                   | jal x1, offset
 jr rs                        | jalr x0, rs, 0                                                | Jump register
 jalr rs                      | jalr x1, rs, 0                                                | Jump and link register
 ret                          | jalr x0, x1, 0                                                | Return from subroutine
-call offset                  | auipc x6, offset[31:12]; jalr x1, x6, offset[11:0]            | Call far-away subroutine
-tail offset                  | auipc x6, offset[31:12]; jalr x0, x6, offset[11:0]            | Tail call far-away subroutine
+call offset                  | 1: auipc x6, %pcrel_hi(offset); jalr x1, x6, %pcrel_lo(1b)    | Call far-away subroutine
+tail offset                  | 1: auipc x6, %pcrel_hi(offset); jalr x0, x6, %pcrel_lo(1b)    | Tail call far-away subroutine
 fence                        | fence iorw, iorw                                              | Fence on all memory and I/O
 
 * [1] We don't specify the code sequence when the B-extension is present, since B-extension still not ratified or frozen. We will specify the expansion sequence once it's frozen.