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Merge pull request #69 from jrtc27/la-pseudos
Document lla, fix table documentation for la and add lga pseudo instruction
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riscv-asm.md

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@@ -314,17 +314,35 @@ The immediate argument to `lui` is an integer in the interval [0x0, 0xfffff].
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Its compressed form, `c.lui`, accepts only those in the subintervals [0x1, 0x1f] and [0xfffe0, 0xfffff].
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Load Address
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-----------------
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------------
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The following example shows the `la` pseudo instruction which
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is used to load symbol addresses:
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The following example shows the `la` pseudo instruction which is used to load
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symbol addresses using the correct sequence based on whether the code is being
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assembled as PIC:
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```assembly
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la a0, msg + 1
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```
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Which generates the following assembler output and relocations
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for non-PIC as seen by `objdump`:
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For non-PIC this is an alias for the `lla` pseudo instruction documented below.
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For PIC this is an alias for the `lga` pseudo instruction documented below.
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The `la` pseudo instruction is the preferred way for getting the address of
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variables in assembly unless explicit control over PC-relative or GOT-indirect
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addressing is required.
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Load Local Address
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------------------
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The following example shows the `lla` pseudo instruction which is used to load
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local symbol addresses:
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```assembly
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lla a0, msg + 1
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```
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This generates the following instructions and relocations as seen by `objdump`:
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```assembly
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0000000000000000 <.text>:
@@ -334,8 +352,18 @@ for non-PIC as seen by `objdump`:
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4: R_RISCV_PCREL_LO12_I .L0
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```
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And generates the following assembler output and relocations
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for PIC as seen by `objdump`:
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Load Global Address
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------------------
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The following example shows the `lga` pseudo instruction which is used to load
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global symbol addresses:
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```assembly
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lga a0, msg + 1
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```
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This generates the following instructions and relocations as seen by `objdump`
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(for RV64; RV32 will use `lw` instead of `ld`):
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```assembly
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0000000000000000 <.text>:
@@ -541,7 +569,10 @@ fail_msg:
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Pseudoinstruction | Base Instruction(s) | Meaning | Comment
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:----------------------------|:--------------------------------------------------------------|:----------|:--------|
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la rd, symbol | auipc rd, symbol[31:12]; addi rd, rd, symbol[11:0] | Load address
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la rd, symbol | auipc rd, symbol[31:12]; addi rd, rd, symbol[11:0] | Load address | Without -fPIC
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la rd, symbol | auipc rd, symbol@GOT[31:12]; l{w\|d} rd, symbol@GOT[11:0]\(rd\) | Load address | With -fPIC
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lla rd, symbol | auipc rd, symbol[31:12]; addi rd, rd, symbol[11:0] | Load local address
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lga rd, symbol | auipc rd, symbol@GOT[31:12]; l{w\|d} rd, symbol@GOT[11:0]\(rd\) | Load global address
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l{b\|h\|w\|d} rd, symbol | auipc rd, symbol[31:12]; l{b\|h\|w\|d} rd, symbol[11:0]\(rd\) | Load global
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s{b\|h\|w\|d} rd, symbol, rt | auipc rt, symbol[31:12]; s{b\|h\|w\|d} rd, symbol[11:0]\(rt\) | Store global
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fl{w\|d} rd, symbol, rt | auipc rt, symbol[31:12]; fl{w\|d} rd, symbol[11:0]\(rt\) | Floating-point load global

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