riscv-elf.md: remove EF_RISCV_COMPACT

The compact code model can be linked with other code models, so the ELF
header is probably not the best place for this information to reside.  For
LTO purposes, this information can be preserved in metadata.

Additionally, remove some typos.

Author: ebahapo

riscv-elf.md

@@ -413,9 +413,9 @@ rules about 2✕XLEN aligned arguments being passed in "aligned" register pairs.
 * e_flags: Describes the format of this ELF file.  These flags are used by the
   linker to disallow linking ELF files with incompatible ABIs together.
 
-   Bit 0 | Bit  1 - 2 | Bit 3 | Bit 4 |  Bit 5  | Bit 6 - 31
-  -------|------------|-------|-------|---------|------------
-   RVC   | Float ABI  |  RVE  |  TSO  | Compact | *Reserved*
+   Bit 0 | Bit  1 - 2 | Bit 3 | Bit 4 | Bit 5 - 31
+  -------|------------|-------|-------|------------
+   RVC   | Float ABI  |  RVE  |  TSO  | _Reserved_
 
 
   * EF_RISCV_RVC (0x0001): This bit is set when the binary targets the C ABI,
@@ -441,8 +441,6 @@ rules about 2✕XLEN aligned arguments being passed in "aligned" register pairs.
   * EF_RISCV_RVE (0x0008): This bit is set when the binary targets the E ABI.
   * EF_RISCV_TSO (0x0010): This bit is set when the binary requires the RVTSO
     memory consistency model.
-  * EF_RISCV_COMPACT (0x0020): This bit is set when the binary targets the
-    compact code model.
 
   Until such a time that the *Reserved* bits (0xffffffe0) are allocated by
   future versions of this specification, they shall not be set by standard
@@ -502,10 +500,10 @@ Enum | ELF Reloc Type            | Description                     | Field
 30   | R_RISCV_TPREL_LO12_I      | TLS LE thread offset            | _I-Type_    |             | `%tprel_lo(symbol)`
 31   | R_RISCV_TPREL_LO12_S      | TLS LE thread offset            | _S-Type_    |             | `%tprel_lo(symbol)`
 32   | R_RISCV_TPREL_ADD         | TLS LE thread usage             |             |             | `%tprel_add(symbol)`
-33   | R_RISCV_ADD8              | 8-bit label addition            | _word8_     | S + A + V
-34   | R_RISCV_ADD16             | 16-bit label addition           | _word16_    | S + A + V
-35   | R_RISCV_ADD32             | 32-bit label addition           | _word32_    | S + A + V
-36   | R_RISCV_ADD64             | 64-bit label addition           | _word64_    | S + A + V
+33   | R_RISCV_ADD8              | 8-bit label addition            | _word8_     | V + S + A
+34   | R_RISCV_ADD16             | 16-bit label addition           | _word16_    | V + S + A
+35   | R_RISCV_ADD32             | 32-bit label addition           | _word32_    | V + S + A
+36   | R_RISCV_ADD64             | 64-bit label addition           | _word64_    | V + S + A
 37   | R_RISCV_SUB8              | 8-bit label subtraction         | _word8_     | V - S - A
 38   | R_RISCV_SUB16             | 16-bit label subtraction        | _word16_    | V - S - A
 39   | R_RISCV_SUB32             | 32-bit label subtraction        | _word32_    | V - S - A
@@ -515,17 +513,17 @@ Enum | ELF Reloc Type            | Description                     | Field
 43   | R_RISCV_ALIGN             | Alignment statement             |
 44   | R_RISCV_RVC_BRANCH        | PC-relative branch offset       | _CB-Type_   | S + A - P
 45   | R_RISCV_RVC_JUMP          | PC-relative jump offset         | _CJ-Type_   | S + A - P
-46   | R_RISCV_RVC_LUI           | Absolute address                | _CI-Type_   | S + A - P
+46   | R_RISCV_RVC_LUI           | Absolute address                | _CI-Type_   | S + A
 47   | R_RISCV_GPREL_I           | GP-relative reference           | _I-Type_    | S + A - GP
 48   | R_RISCV_GPREL_S           | GP-relative reference           | _S-Type_    | S + A - GP
 49   | R_RISCV_TPREL_I           | TP-relative TLS LE load         | _I-Type_
 50   | R_RISCV_TPREL_S           | TP-relative TLS LE store        | _S-Type_
-51   | R_RISCV_RELAX             | Instruction pair can be relaxed |
-52   | R_RISCV_SUB6              | Local label subtraction         |
-53   | R_RISCV_SET6              | Local label subtraction         |
-54   | R_RISCV_SET8              | Local label subtraction         |
-55   | R_RISCV_SET16             | Local label subtraction         |
-56   | R_RISCV_SET32             | Local label subtraction         |
+51   | R_RISCV_RELAX             | Instruction pair can be relaxed | _word6_     | V - S - A
+52   | R_RISCV_SUB6              | Local label subtraction         | _word6_     | S + A
+53   | R_RISCV_SET6              | Local label assignment          | _word6_     | S + A
+54   | R_RISCV_SET8              | Local label assignment          | _word8_     | S + A
+55   | R_RISCV_SET16             | Local label assignment          | _word16_    | S + A
+56   | R_RISCV_SET32             | Local label assignment          | _word32_    | S + A
 57   | R_RISCV_32_PCREL          | PC-relative reference           | _word32_    | S + A - P
 58   | R_RISCV_IRELATIVE         | Runtime relocation              | _wordclass_ | `ifunc_resolver(B + A)`
 59   | R_RISCV_64_PCREL          | PC-relative reference           | _word64_    | S + A - P