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riscv-elf.md: add new definitions for the compact code model
Add the basic structures to support the compact code model.
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‎riscv-elf.md‎

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@@ -10,6 +10,7 @@
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* [ILP32E Calling Convention](#ilp32e-calling-convention)
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* [Named ABIs](#named-abis)
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* [Default ABIs](#default-abis)
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* [Code models](#code-models)
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3. [C type details](#c-types)
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* [C type sizes and alignments](#c-type-sizes)
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* [C type representations](#c-type-representation)
@@ -320,6 +321,41 @@ default ABIs for specific architectures:
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* **on RV32G**: [ILP32D](#abi-ilp32d)
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## <a name=code-models /> Code models
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The RISC-V architecture constrains the addressing of positions in the
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address space. There is no single instruction that can refer to an arbitrary
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memory position using a literal as its argument. Rather, instructions exist
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that, when combined together, can then be used to refer to a memory position
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via its literal. And, when not, other data structures are used to help the
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code to address the memory space. The coding conventions governing their use
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are known as code models.
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### Medium low
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The medium low code model, or `medlow`, allows the code to address the lower
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2 GiB of the address space. By using the instruction `lui` and `ld` or `addi`
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instructions, for example, a 32-bit address literal can be produced.
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This code model is not position independent.
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### Meidum any
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The medium any code model, or `medany`, allows the code to address the range
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between -2 GiB and +2 GiB from its position. By using the instruction `auipc`
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and `st` or `addi` instructions, for example, a signed 32-bit offset, relative
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to the value of the `pc` register, can be produced. This code model is
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position independent.
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### Compact
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The compact code model allows the code to address the whole 64-bit address space,
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especially when code and data are located far apart. By using the Global
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Offset Table, or GOT, to hold the 64-bit address literals, any memory position
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can be referred. By using the instructions `lui` and `addi`, a signed 32-bit
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offset, relative to the value of the `gp` register, can be produced, referring
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to address literals in the GOT. This code model is position independent.
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Does not apply to the ILP32 ABIs.
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# <a name=c-types></a> C type details
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## <a name=c-type-sizes></a> C type sizes and alignments
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@@ -413,9 +449,9 @@ rules about 2✕XLEN aligned arguments being passed in "aligned" register pairs.
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* e_flags: Describes the format of this ELF file. These flags are used by the
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linker to disallow linking ELF files with incompatible ABIs together.
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Bit 0 | Bit 1 - 2 | Bit 3 | Bit 4 | Bit 5 - 31
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-------|------------|-------|-------|------------
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RVC | Float ABI | RVE | TSO | *Reserved*
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Bit 0 | Bit 1 - 2 | Bit 3 | Bit 4 | Bit 5 | Bit 6 - 31
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-------|------------|-------|-------|---------|------------
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RVC | Float ABI | RVE | TSO | Compact | *Reserved*
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* EF_RISCV_RVC (0x0001): This bit is set when the binary targets the C ABI,
@@ -441,6 +477,8 @@ rules about 2✕XLEN aligned arguments being passed in "aligned" register pairs.
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* EF_RISCV_RVE (0x0008): This bit is set when the binary targets the E ABI.
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* EF_RISCV_TSO (0x0010): This bit is set when the binary requires the RVTSO
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memory consistency model.
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* EF_RISCV_COMPACT (0x0020): This bit is set when the binary targets the
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compact code model.
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Until such a time that the *Reserved* bits (0xffffffe0) are allocated by
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future versions of this specification, they shall not be set by standard
@@ -469,65 +507,76 @@ Global Offset Table or DWARF meta data.
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The following table provides details of the RISC-V ELF relocations (instruction
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specific relocations show the instruction type in the Details column):
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Enum | ELF Reloc Type | Description | Field | Calculation | Details
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:--- | :------------------ | :--------------- | :---- | :---------- | :-------
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0 | R_RISCV_NONE | None |
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1 | R_RISCV_32 | Runtime relocation | _word32_ | S + A
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2 | R_RISCV_64 | Runtime relocation | _word64_ | S + A
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3 | R_RISCV_RELATIVE | Runtime relocation | _wordclass_ | B + A
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4 | R_RISCV_COPY | Runtime relocation | | | Must be in executable; not allowed in shared library
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5 | R_RISCV_JUMP_SLOT | Runtime relocation | _wordclass_ | S | Handled by PLT unless `LD_BIND_NOW`
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6 | R_RISCV_TLS_DTPMOD32 | TLS relocation | _word32_ | S->TLSINDEX
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7 | R_RISCV_TLS_DTPMOD64 | TLS relocation | _word64_ | S->TLSINDEX
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8 | R_RISCV_TLS_DTPREL32 | TLS relocation | _word32_ | S + A + TLS - TLS_TP_OFFSET
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9 | R_RISCV_TLS_DTPREL64 | TLS relocation | _word64_ | S + A + TLS - TLS_TP_OFFSET
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10 | R_RISCV_TLS_TPREL32 | TLS relocation | _word32_ | S + A + TLS + S_TLS_OFFSET - TLS_DTV_OFFSET
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11 | R_RISCV_TLS_TPREL64 | TLS relocation | _word64_ | S + A + TLS + S_TLS_OFFSET - TLS_DTV_OFFSET
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16 | R_RISCV_BRANCH | PC-relative branch | _B-Type_ | S + A - P
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17 | R_RISCV_JAL | PC-relative jump | _J-Type_ | S + A - P
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18 | R_RISCV_CALL | PC-relative call | _J-Type_ | S + A - P | Macros `call`, `tail`
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19 | R_RISCV_CALL_PLT | PC-relative call (PLT) | _J-Type_ | S + A - P | Macros `call`, `tail` (PIC)
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20 | R_RISCV_GOT_HI20 | PC-relative GOT reference | _U-Type_ | G + A | `%got_pcrel_hi(symbol)`
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21 | R_RISCV_TLS_GOT_HI20 | PC-relative TLS IE GOT offset | _U-Type_ | | Macro `la.tls.ie`
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22 | R_RISCV_TLS_GD_HI20 | PC-relative TLS GD reference | _U-Type_ | | Macro `la.tls.gd`
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23 | R_RISCV_PCREL_HI20 | PC-relative reference | _U-Type_ | S + A - P | `%pcrel_hi(symbol)`
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24 | R_RISCV_PCREL_LO12_I | PC-relative reference | _I-type_ | S + A - P | `%pcrel_lo(address of %pcrel_hi)`
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25 | R_RISCV_PCREL_LO12_S | PC-relative reference | _S-Type_ | S + A - P | `%pcrel_lo(address of %pcrel_hi)`
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26 | R_RISCV_HI20 | Absolute address | _U-Type_ | S + A | `%hi(symbol)`
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27 | R_RISCV_LO12_I | Absolute address | _I-Type_ | S + A | `%lo(symbol)`
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28 | R_RISCV_LO12_S | Absolute address | _S-Type_ | S + A | `%lo(symbol)`
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29 | R_RISCV_TPREL_HI20 | TLS LE thread offset | _U-Type_ | | `%tprel_hi(symbol)`
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30 | R_RISCV_TPREL_LO12_I | TLS LE thread offset | _I-Type_ | | `%tprel_lo(symbol)`
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31 | R_RISCV_TPREL_LO12_S | TLS LE thread offset | _S-Type_ | | `%tprel_lo(symbol)`
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32 | R_RISCV_TPREL_ADD | TLS LE thread usage | | | `%tprel_add(symbol)`
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33 | R_RISCV_ADD8 | 8-bit label addition | _word8_ | V + S + A
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34 | R_RISCV_ADD16 | 16-bit label addition | _word16_ | V + S + A
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35 | R_RISCV_ADD32 | 32-bit label addition | _word32_ | V + S + A
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36 | R_RISCV_ADD64 | 64-bit label addition | _word64_ | V + S + A
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37 | R_RISCV_SUB8 | 8-bit label subtraction | _word8_ | V - S - A
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38 | R_RISCV_SUB16 | 16-bit label subtraction | _word16_ | V - S - A
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39 | R_RISCV_SUB32 | 32-bit label subtraction | _word32_ | V - S - A
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40 | R_RISCV_SUB64 | 64-bit label subtraction | _word64_ | V - S - A
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41 | R_RISCV_GNU_VTINHERIT | GNU C++ vtable hierarchy |
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42 | R_RISCV_GNU_VTENTRY | GNU C++ vtable member usage |
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43 | R_RISCV_ALIGN | Alignment statement |
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44 | R_RISCV_RVC_BRANCH | PC-relative branch offset | _CB-Type_ | S + A - P
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45 | R_RISCV_RVC_JUMP | PC-relative jump offset | _CJ-Type_ | S + A - P
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46 | R_RISCV_RVC_LUI | Absolute address | _CI-Type_ | S + A
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47 | R_RISCV_GPREL_I | GP-relative reference | _I-Type_ | S + A - GP
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48 | R_RISCV_GPREL_S | GP-relative reference | _S-Type_ | S + A - GP
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49 | R_RISCV_TPREL_I | TP-relative TLS LE load | _I-Type_
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50 | R_RISCV_TPREL_S | TP-relative TLS LE store | _S-Type_
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51 | R_RISCV_RELAX | Instruction pair can be relaxed |
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52 | R_RISCV_SUB6 | Local label subtraction | _word6_ | V - S - A
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53 | R_RISCV_SET6 | Local label assignment | _word6_ | S + A
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54 | R_RISCV_SET8 | Local label assignment | _word8_ | S + A
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55 | R_RISCV_SET16 | Local label assignment | _word16_ | S + A
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56 | R_RISCV_SET32 | Local label assignment | _word32_ | S + A
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57 | R_RISCV_32_PCREL | PC-relative reference | _word32_ | S + A - P
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58 | R_RISCV_IRELATIVE | Runtime relocation | _wordclass_ | `ifunc_resolver(B + A)`
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59-191 | *Reserved* | Reserved for future standard use
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192-255 | *Reserved* | Reserved for nonstandard ABI extensions
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Enum | ELF Reloc Type | Description | Field | Calculation | Details
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:--- | :------------- | :---------- | :---- | :---------- | :------
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0 | R_RISCV_NONE | None |
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1 | R_RISCV_32 | Runtime relocation | _word32_ | S + A
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2 | R_RISCV_64 | Runtime relocation | _word64_ | S + A
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3 | R_RISCV_RELATIVE | Runtime relocation | _wordclass_ | B + A
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4 | R_RISCV_COPY | Runtime relocation | | | Must be in executable. not allowed in shared library
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5 | R_RISCV_JUMP_SLOT | Runtime relocation | _wordclass_ | S | Handled by PLT unless `LD_BIND_NOW`
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6 | R_RISCV_TLS_DTPMOD32 | TLS relocation | _word32_ | S->TLSINDEX
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7 | R_RISCV_TLS_DTPMOD64 | TLS relocation | _word64_ | S->TLSINDEX
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8 | R_RISCV_TLS_DTPREL32 | TLS relocation | _word32_ | S + A + TLS - TLS_TP_OFFSET
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9 | R_RISCV_TLS_DTPREL64 | TLS relocation | _word64_ | S + A + TLS - TLS_TP_OFFSET
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10 | R_RISCV_TLS_TPREL32 | TLS relocation | _word32_ | S + A + TLS + S_TLS_OFFSET - TLS_DTV_OFFSET
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11 | R_RISCV_TLS_TPREL64 | TLS relocation | _word64_ | S + A + TLS + S_TLS_OFFSET - TLS_DTV_OFFSET
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16 | R_RISCV_BRANCH | PC-relative branch | _B-Type_ | S + A - P
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17 | R_RISCV_JAL | PC-relative jump | _J-Type_ | S + A - P
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18 | R_RISCV_CALL | PC-relative call | _J-Type_ | S + A - P | Macros `call`, `tail`
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19 | R_RISCV_CALL_PLT | PC-relative call (PLT) | _J-Type_ | S + A - P | Macros `call`, `tail` (PIC)
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20 | R_RISCV_GOT_HI20 | PC-relative GOT reference | _U-Type_ | G + A | `%got_pcrel_hi(symbol)`
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21 | R_RISCV_TLS_GOT_HI20 | PC-relative TLS IE GOT offset | _U-Type_ | | Macro `la.tls.ie`
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22 | R_RISCV_TLS_GD_HI20 | PC-relative TLS GD reference | _U-Type_ | | Macro `la.tls.gd`
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23 | R_RISCV_PCREL_HI20 | PC-relative reference | _U-Type_ | S + A - P | `%pcrel_hi(symbol)`
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24 | R_RISCV_PCREL_LO12_I | PC-relative reference | _I-type_ | S + A - P | `%pcrel_lo(address of %pcrel_hi)`
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25 | R_RISCV_PCREL_LO12_S | PC-relative reference | _S-Type_ | S + A - P | `%pcrel_lo(address of %pcrel_hi)`
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26 | R_RISCV_HI20 | Absolute address | _U-Type_ | S + A | `%hi(symbol)`
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27 | R_RISCV_LO12_I | Absolute address | _I-Type_ | S + A | `%lo(symbol)`
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28 | R_RISCV_LO12_S | Absolute address | _S-Type_ | S + A | `%lo(symbol)`
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29 | R_RISCV_TPREL_HI20 | TLS LE thread offset | _U-Type_ | | `%tprel_hi(symbol)`
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30 | R_RISCV_TPREL_LO12_I | TLS LE thread offset | _I-Type_ | | `%tprel_lo(symbol)`
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31 | R_RISCV_TPREL_LO12_S | TLS LE thread offset | _S-Type_ | | `%tprel_lo(symbol)`
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32 | R_RISCV_TPREL_ADD | TLS LE thread usage | | | `%tprel_add(symbol)`
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33 | R_RISCV_ADD8 | 8-bit label addition | _word8_ | S + A + V
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34 | R_RISCV_ADD16 | 16-bit label addition | _word16_ | S + A + V
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35 | R_RISCV_ADD32 | 32-bit label addition | _word32_ | S + A + V
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36 | R_RISCV_ADD64 | 64-bit label addition | _word64_ | S + A + V
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37 | R_RISCV_SUB8 | 8-bit label subtraction | _word8_ | V - S - A
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38 | R_RISCV_SUB16 | 16-bit label subtraction | _word16_ | V - S - A
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39 | R_RISCV_SUB32 | 32-bit label subtraction | _word32_ | V - S - A
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40 | R_RISCV_SUB64 | 64-bit label subtraction | _word64_ | V - S - A
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41 | R_RISCV_GNU_VTINHERIT | GNU C++ vtable hierarchy |
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42 | R_RISCV_GNU_VTENTRY | GNU C++ vtable member usage |
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43 | R_RISCV_ALIGN | Alignment statement |
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44 | R_RISCV_RVC_BRANCH | PC-relative branch offset | _CB-Type_ | S + A - P
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45 | R_RISCV_RVC_JUMP | PC-relative jump offset | _CJ-Type_ | S + A - P
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46 | R_RISCV_RVC_LUI | Absolute address | _CI-Type_ | S + A - P
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47 | R_RISCV_GPREL_I | GP-relative reference | _I-Type_ | S + A - GP
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48 | R_RISCV_GPREL_S | GP-relative reference | _S-Type_ | S + A - GP
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49 | R_RISCV_TPREL_I | TP-relative TLS LE load | _I-Type_
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50 | R_RISCV_TPREL_S | TP-relative TLS LE store | _S-Type_
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51 | R_RISCV_RELAX | Instruction pair can be relaxed |
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52 | R_RISCV_SUB6 | Local label subtraction |
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53 | R_RISCV_SET6 | Local label subtraction |
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54 | R_RISCV_SET8 | Local label subtraction |
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55 | R_RISCV_SET16 | Local label subtraction |
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56 | R_RISCV_SET32 | Local label subtraction |
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57 | R_RISCV_32_PCREL | PC-relative reference | _word32_ | S + A - P
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58 | R_RISCV_IRELATIVE | Runtime relocation | _wordclass_ | `ifunc_resolver(B + A)`
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59 | R_RISCV_64_PCREL | PC-relative reference | _word64_ | S + A - P
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60 | R_RISCV_GPREL_HI20 | GP-relative reference | _U-type_ | S + A - GP | `%gprel_hi(symbol)`
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61 | R_RISCV_GPREL_LO12_I | GP-relative reference | _I-type_ | S + A - GP | `%gprel_lo(symbol)`
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62 | R_RISCV_GPREL_LO12_S | GP-relative reference | _S-type_ | S + A - GP | `%gprel_lo(symbol)`
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63 | R_RISCV_GPREL_ADD | GP-relative usage | | | `%gprel(symbol)`
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64 | R_RISCV_GPREL_LOAD | GP-relative usage | | | `%gprel(symbol)`
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65 | R_RISCV_GOT_GPREL_HI20 | GP-relative GOT reference | _U-type_ | G + A - GP | `%got_gprel_hi(symbol)`
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66 | R_RISCV_GOT_GPREL_LO12_I | GP-relative GOT reference | _I-type_ | G + A - GP | `%got_gprel_lo(symbol)`
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67 | R_RISCV_GOT_GPREL_ADD | GP-relative GOT usage | | | `%got_gprel(symbol)`
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68 | R_RISCV_GOT_GPREL_LOAD | GP-relative GOT usage | | | `%got_gprel(symbol)`
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69 | R_RISCV_GOT_GPREL_STORE | GP-relative GOT usage | | | `%got_gprel(symbol)`
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70-191 | *Reserved* | Reserved for future standard use |
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192-255 | *Reserved* | Reserved for nonstandard ABI extensions |
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Nonstandard extensions are free to use relocation numbers 192-255 for any
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purpose. These relocations may conflict with other nonstandard extensions.

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