Skip to content

Commit 653ace8

Browse files
authored
Merge pull request #397 from rui314/patch-1
Relax GOT indirection into PC-relative addressing
2 parents bb6f298 + 1a91124 commit 653ace8

File tree

1 file changed

+74
-0
lines changed

1 file changed

+74
-0
lines changed

riscv-elf.adoc

Lines changed: 74 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1612,6 +1612,80 @@ optimize code size and performance of the symbol accessing.
16121612

16131613
NOTE: Tag_RISCV_x3_reg_usage is treated as 0 if it is not present.
16141614

1615+
==== GOT load relaxation
1616+
1617+
Target Relocation:: R_RISCV_GOT_HI20, R_RISCV_PCREL_LO12_I
1618+
1619+
Description:: This relaxation can relax a GOT indirection into load
1620+
immediate or PC-relative addressing. This relaxation is intended to
1621+
optimize the `lga` assembly pseudo-instruction (and thus `la` for
1622+
PIC objects), which loads a symbol's address from a GOT entry with
1623+
an `auipc` + `l[w|d]` instruction pair.
1624+
1625+
Condition::
1626+
- Both `R_RISCV_GOT_HI20` and `R_RISCV_PCREL_LO12_I` are marked with
1627+
`R_RISCV_RELAX`.
1628+
1629+
- The symbol pointed to by `R_RISCV_PCREL_LO12_I` is at the location to
1630+
which `R_RISCV_GOT_HI20` refers.
1631+
1632+
- If the symbol is absolute, its address is within `0x0` ~ `0x7ff` or
1633+
`0xfffffffffffff800` ~ `0xffffffffffffffff` for RV64 and
1634+
`0xfffff800` ~ `0xffffffff` for RV32.
1635+
Note that an undefined weak symbol satisfies this condition because
1636+
such a symbol is handled as if it were an absolute symbol at address 0.
1637+
1638+
- If the symbol is relative, it's bound at link time to be within the
1639+
object. It should not be of the GNU ifunc type. Additionally, the offset
1640+
between the location to which `R_RISCV_GOT_HI20` refers and the target
1641+
symbol should be within a range of +-2GiB.
1642+
1643+
Relaxation::
1644+
- The `auipc` instruction associated with `R_RISCV_GOT_HI20` can be
1645+
removed if the symbol is absolute.
1646+
1647+
- The instruction or instructions associated with `R_RISCV_PCREL_LO12_I`
1648+
can be rewritten to either `c.li` or `addi` to materialize the symbol's
1649+
address directly in a register.
1650+
1651+
- If this relaxation eliminates all references to the symbol's GOT slot,
1652+
the linker may opt not to create a GOT slot for that symbol.
1653+
1654+
Example::
1655+
+
1656+
--
1657+
Relaxation candidate:
1658+
[,asm]
1659+
----
1660+
label:
1661+
auipc tX, 0 # R_RISCV_GOT_HI20 (symbol), R_RISCV_RELAX
1662+
l[w|d] tY, 0(tX) # R_RISCV_PCREL_LO12_I (label), R_RISCV_RELAX
1663+
----
1664+
1665+
Relaxation result (absolute symbol whose address can be represented as
1666+
a 6-bit signed integer and if the RVC instruction is permitted):
1667+
1668+
[,asm]
1669+
----
1670+
c.li tY, <symbol-value>
1671+
----
1672+
1673+
Relaxation result (absolute symbol and did not meet the above condition
1674+
to use `c.li`):
1675+
1676+
[,asm]
1677+
----
1678+
addi tY, zero, <symbol-value>
1679+
----
1680+
1681+
Relaxation result (relative symbol):
1682+
[,asm]
1683+
----
1684+
auipc tX, <hi>
1685+
addi tY, tX, <lo>
1686+
----
1687+
--
1688+
16151689
==== Zero-page Relaxation
16161690

16171691
Target Relocation:: R_RISCV_HI20, R_RISCV_LO12_I, R_RISCV_LO12_S

0 commit comments

Comments
 (0)