Revert "Make it more explicit that some e_flags fields are multi-bit"

This reverts commit 522d7db.

Author: aswaterman

riscv-elf.md

@@ -417,15 +417,15 @@ rules about 2✕XLEN aligned arguments being passed in "aligned" register pairs.
    RVC   | Float ABI  |  RVE  |  TSO  | *Reserved*
 
 
-  * EF_RISCV_RVC (`e_flags & 0x1`): This bit is set when the binary targets the C ABI,
+  * EF_RISCV_RVC (0x0001): This bit is set when the binary targets the C ABI,
     which allows instructions to be aligned to 16-bit boundaries (the base RV32
     and RV64 ISAs only allow 32-bit instruction alignment).  When linking
     objects which specify EF_RISCV_RVC, the linker is permitted to use RVC
     instructions such as C.JAL in the relaxation process.
-  * EF_RISCV_FLOAT_ABI_SOFT (`(e_flags & 0x6) == 0x0)`)
-  * EF_RISCV_FLOAT_ABI_SINGLE (`(e_flags & 0x6) == 0x2)`)
-  * EF_RISCV_FLOAT_ABI_DOUBLE (`(e_flags & 0x6) == 0x4)`)
-  * EF_RISCV_FLOAT_ABI_QUAD (`(e_flags & 0x6) == 0x6)`): These flags identify the floating point
+  * EF_RISCV_FLOAT_ABI_SOFT (0x0000)
+  * EF_RISCV_FLOAT_ABI_SINGLE (0x0002)
+  * EF_RISCV_FLOAT_ABI_DOUBLE (0x0004)
+  * EF_RISCV_FLOAT_ABI_QUAD (0x0006): These flags identify the floating point
     ABI in use for this ELF file.  They store the largest floating-point type
     that ends up in registers as part of the ABI (but do not control if code
     generation is allowed to use floating-point internally).  The rule is that
@@ -434,8 +434,8 @@ rules about 2✕XLEN aligned arguments being passed in "aligned" register pairs.
     store "float" and "double" values in F registers, but would not store "long
     double" values in F registers.  If none of the float ABI flags are set, the
     object is taken to use the soft-float ABI.
-  * EF_RISCV_RVE (`e_flags & 0x8`): This bit is set when the binary targets the E ABI.
-  * EF_RISCV_TSO (`e_flags & 0x10`): This bit is set when the binary requires the RVTSO
+  * EF_RISCV_RVE (0x0008): This bit is set when the binary targets the E ABI.
+  * EF_RISCV_TSO (0x0010): This bit is set when the binary requires the RVTSO
     memory consistency model.
 
   Until such a time that the *Reserved* bits (0xffffffe0) are allocated by